* SPL
*/
-#define CONFIG_SPL_MAX_SIZE 0x0000fff0
-#define CONFIG_SPL_STACK 0x00020000
-#define CONFIG_SPL_BSS_START_ADDR 0x00020000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x0001ffff
-#define CONFIG_SYS_SPL_MALLOC_START 0x00040000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x0001ffff
#define CONFIG_SYS_UBOOT_BASE 0xfff90000
#define CONFIG_SYS_UBOOT_START 0x00800000
* FLASH configuration
*/
-#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max num of sects on one chip */
#define CONFIG_SYS_FLASH_BASE 0xfff80000
/* auto boot */
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
-
/*
* Network
*/
#define __io
/* Data, registers and alternate blocks are at the same offset */
/* Each 8-bit ATA register is aligned to a 4-bytes address */
-/* Controller supports 48-bits LBA addressing */
-#define CONFIG_LBA48
/* A single bus, a single device */
/* ATA registers base is at SATA controller base */
/* ATA bus 0 is orion5x port 1 on ED Mini V2 */
/* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_SDRAM_BASE 0
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
#endif /* _CONFIG_EDMINIV2_H */