+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2013
* Texas Instruments Incorporated.
*
* Configuration settings for the TI DRA7XX board.
* See ti_omap5_common.h for omap5 common settings.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_DRA7XX_EVM_H
#include <environment/ti/dfu.h>
-#ifdef CONFIG_SPL_BUILD
#define CONFIG_IODELAY_RECALIBRATION
-#endif
#define CONFIG_VERY_BIG_RAM
-#define CONFIG_NR_DRAM_BANKS 2
#define CONFIG_MAX_MEM_MAPPED 0x80000000
#ifndef CONFIG_QSPI_BOOT
#define CONFIG_SYS_OMAP_ABE_SYSCK
#ifndef CONFIG_SPL_BUILD
-/* Define the default GPT table for eMMC */
-#define PARTS_DEFAULT \
- /* Linux partitions */ \
- "uuid_disk=${uuid_gpt_disk};" \
- "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
- /* Android partitions */ \
- "partitions_android=" \
- "uuid_disk=${uuid_gpt_disk};" \
- "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \
- "name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \
- "name=environment,size=128K,uuid=${uuid_gpt_environment};" \
- "name=misc,size=128K,uuid=${uuid_gpt_misc};" \
- "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \
- "name=efs,size=16M,uuid=${uuid_gpt_efs};" \
- "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \
- "name=recovery,size=10M,uuid=${uuid_gpt_recovery};" \
- "name=boot,size=10M,uuid=${uuid_gpt_boot};" \
- "name=system,size=768M,uuid=${uuid_gpt_system};" \
- "name=cache,size=256M,uuid=${uuid_gpt_cache};" \
- "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \
- "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \
- "name=userdata,size=-,uuid=${uuid_gpt_userdata}"
-
#define DFUARGS \
"dfu_bufsiz=0x10000\0" \
DFU_ALT_INFO_MMC \
DFU_ALT_INFO_EMMC \
DFU_ALT_INFO_RAM \
DFU_ALT_INFO_QSPI
-#else
-/* Discard fastboot in SPL build, to spare some space */
-#undef CONFIG_FASTBOOT
-#undef CONFIG_USB_FUNCTION_FASTBOOT
-#undef CONFIG_CMD_FASTBOOT
-#undef CONFIG_ANDROID_BOOT_IMAGE
-#undef CONFIG_FASTBOOT_BUF_ADDR
-#undef CONFIG_FASTBOOT_BUF_SIZE
-#undef CONFIG_FASTBOOT_FLASH
#endif
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_CMD_BOOTD
-#ifdef CONFIG_SPL_DFU_SUPPORT
+#ifdef CONFIG_SPL_DFU
#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000
#define DFUARGS \
"dfu_bufsiz=0x10000\0" \
#include <configs/ti_omap5_common.h>
/* Enhance our eMMC support / experience. */
-#define CONFIG_RANDOM_UUID
#define CONFIG_HSMMC2_8BIT
/* CPSW Ethernet */
-#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
-#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
-#define CONFIG_MII /* Required in net/eth.c */
#define CONFIG_PHY_TI
/* SPI */
-#undef CONFIG_OMAP3_SPI
#define CONFIG_TI_SPI_MMAP
-#define CONFIG_SF_DEFAULT_SPEED 76800000
-#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#define CONFIG_QSPI_QUAD_SUPPORT
/*
/* SPI SPL */
#define CONFIG_TI_EDMA3
-#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
#define CONFIG_SUPPORT_EMMC_BOOT
/* USB xHCI HOST */
#define CONFIG_USB_XHCI_OMAP
-#define CONFIG_OMAP_USB_PHY
#define CONFIG_OMAP_USB2PHY2_HOST
/* SATA */
-#define CONFIG_LIBATA
-#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
-#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
-#define CONFIG_SYS_SCSI_MAX_LUN 1
-#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
- CONFIG_SYS_SCSI_MAX_LUN)
/* NAND support */
#ifdef CONFIG_NAND
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
/* NAND: driver related configs */
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
50, 51, 52, 53, 54, 55, 56, 57, }
#define CONFIG_SYS_NAND_ECCSIZE 512
#define CONFIG_SYS_NAND_ECCBYTES 14
-#define MTDIDS_DEFAULT "nand0=nand.0"
-#define MTDPARTS_DEFAULT "mtdparts=nand.0:" \
- "128k(NAND.SPL)," \
- "128k(NAND.SPL.backup1)," \
- "128k(NAND.SPL.backup2)," \
- "128k(NAND.SPL.backup3)," \
- "256k(NAND.u-boot-spl-os)," \
- "1m(NAND.u-boot)," \
- "128k(NAND.u-boot-env)," \
- "128k(NAND.u-boot-env.backup1)," \
- "8m(NAND.kernel)," \
- "-(NAND.file-system)"
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000
/* NAND: SPL related configs */
-#ifdef CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_AM33XX_BCH
-#endif
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os-boot params*/
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* !CONFIG_NAND */
#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
#define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */
/* #define CONFIG_INIT_IGNORE_ERROR */
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
-#define CONFIG_SYS_FLASH_PROTECTION
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_FLASH_CFI_MTD
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_FLASH_BASE (0x08000000)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
/* Reduce SPL size by removing unlikey targets */
#ifdef CONFIG_NOR_BOOT
#define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */
-#define MTDIDS_DEFAULT "nor0=physmap-flash.0"
-#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \
- "128k(NOR.SPL)," \
- "128k(NOR.SPL.backup1)," \
- "128k(NOR.SPL.backup2)," \
- "128k(NOR.SPL.backup3)," \
- "256k(NOR.u-boot-spl-os)," \
- "1m(NOR.u-boot)," \
- "128k(NOR.u-boot-env)," \
- "128k(NOR.u-boot-env.backup1)," \
- "8m(NOR.kernel)," \
- "-(NOR.rootfs)"
#define CONFIG_ENV_OFFSET 0x001c0000
#define CONFIG_ENV_OFFSET_REDUND 0x001e0000
#endif