Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

[platform/kernel/u-boot.git] / include / configs / digsy_mtc.h

diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h
index 7a1a7c3..bfbec6a 100644 (file)
--- a/include/configs/digsy_mtc.h
+++ b/include/configs/digsy_mtc.h
@@ -40,10 +40,17 @@
 #define CONFIG_MPC5200         1       /* (more precisely an MPC5200 CPU) */
 #define CONFIG_DIGSY_MTC       1       /* ... on InterControl digsyMTC board */
 
-#define CONFIG_SYS_MPC5XXX_CLKIN       33000000
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ * 0xFFF00000  boot high (standard configuration)
+ * 0xFE000000  boot low
+ * 0x00100000  boot from RAM (for testing only)
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE   0xFFF00000      /* Standard: boot high */
+#endif
 
-#define BOOTFLAG_COLD          0x01
-#define BOOTFLAG_WARM          0x02
+#define CONFIG_SYS_MPC5XXX_CLKIN       33000000
 
 #define CONFIG_SYS_CACHELINE_SIZE      32
 
@@ -103,7 +110,7 @@
 #define CONFIG_CMD_SPI
 #define CONFIG_CMD_USB
 
-#if (TEXT_BASE == 0xFF000000)
+#if (CONFIG_SYS_TEXT_BASE == 0xFF000000)
 #define CONFIG_SYS_LOWBOOT     1
 #endif
 
@@ -242,9 +249,14 @@
 /*
  * RTC configuration
  */
+#if defined(CONFIG_DIGSY_REV5)
+#define CONFIG_SYS_I2C_RTC_ADDR        0x56
+#define CONFIG_RTC_RV3029
+#else
 #define CONFIG_RTC_DS1337
 #define CONFIG_SYS_I2C_RTC_ADDR        0x68
 #define CONFIG_SYS_DS1339_TCR_VAL      0xAB    /* diode + 4k resistor */
+#endif
 
 /*
  * Flash configuration
@@ -252,14 +264,24 @@
 #define        CONFIG_SYS_FLASH_CFI            1
 #define        CONFIG_FLASH_CFI_DRIVER 1
 
+#if defined(CONFIG_DIGSY_REV5)
+#define CONFIG_SYS_FLASH_BASE          0xFE000000
+#define CONFIG_SYS_FLASH_BASE_CS1      0xFC000000
+#define CONFIG_SYS_MAX_FLASH_BANKS     2
+#define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE_CS1, \
+                                       CONFIG_SYS_FLASH_BASE}
+#define CONFIG_SYS_UPDATE_FLASH_SIZE
+#define CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
+#else
 #define CONFIG_SYS_FLASH_BASE          0xFF000000
-#define CONFIG_SYS_FLASH_SIZE  0x01000000
-
 #define CONFIG_SYS_MAX_FLASH_BANKS     1
+#define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE }
+#endif
+
 #define CONFIG_SYS_MAX_FLASH_SECT      256
 #define CONFIG_FLASH_16BIT
 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
-#define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE }
+#define CONFIG_SYS_FLASH_SIZE  0x01000000
 #define CONFIG_SYS_FLASH_ERASE_TOUT    240000
 #define CONFIG_SYS_FLASH_WRITE_TOUT    500
 
@@ -301,14 +323,13 @@
  *  Use SRAM until RAM will be available
  */
 #define CONFIG_SYS_INIT_RAM_ADDR       MPC5XXX_SRAM
-#define CONFIG_SYS_INIT_RAM_END                MPC5XXX_SRAM_SIZE
+#define CONFIG_SYS_INIT_RAM_SIZE               MPC5XXX_SRAM_SIZE
 
-#define CONFIG_SYS_GBL_DATA_SIZE       4096
 #define CONFIG_SYS_GBL_DATA_OFFSET     \
-       (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
-#define CONFIG_SYS_MONITOR_BASE        TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE
 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 #define CONFIG_SYS_RAMBOOT             1
 #endif
@@ -403,6 +424,12 @@
 #define CONFIG_SYS_CS0_SIZE            CONFIG_SYS_FLASH_SIZE
 #define CONFIG_SYS_CS0_CFG             0x0002DD00
 
+#if defined(CONFIG_DIGSY_REV5)
+#define CONFIG_SYS_CS1_START           CONFIG_SYS_FLASH_BASE_CS1
+#define CONFIG_SYS_CS1_SIZE            CONFIG_SYS_FLASH_SIZE
+#define CONFIG_SYS_CS1_CFG             0x0002DD00
+#endif
+
 #define CONFIG_SYS_CS_BURST            0x00000000
 #define CONFIG_SYS_CS_DEADCYCLE        0x11111111