Move CONFIG_OF_LIBFDT to Kconfig

[platform/kernel/u-boot.git] / include / configs / devkit3250.h

diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
index b8218b5..a8ce7e1 100644 (file)
--- a/include/configs/devkit3250.h
+++ b/include/configs/devkit3250.h
@@ -21,7 +21,9 @@
 
 #define CONFIG_SYS_ICACHE_OFF
 #define CONFIG_SYS_DCACHE_OFF
+#if !defined(CONFIG_SPL_BUILD)
 #define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
 #define CONFIG_BOARD_EARLY_INIT_F
 
 /*
@@ -31,7 +33,7 @@
 #define CONFIG_SYS_MALLOC_LEN          SZ_1M
 #define CONFIG_SYS_SDRAM_BASE          EMC_DYCS0_BASE
 #define CONFIG_SYS_SDRAM_SIZE          SZ_64M
-#define CONFIG_SYS_TEXT_BASE           0x83FA0000
+#define CONFIG_SYS_TEXT_BASE           0x83F00000
 #define CONFIG_SYS_MEMTEST_START       (CONFIG_SYS_SDRAM_BASE + SZ_32K)
 #define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_TEXT_BASE - SZ_1M)
 
@@ -47,6 +49,13 @@
 #define CONFIG_BAUDRATE                        115200
 
 /*
+ * DMA
+ */
+#if !defined(CONFIG_SPL_BUILD)
+#define CONFIG_DMA_LPC32XX
+#endif
+
+/*
  * I2C
  */
 #define CONFIG_SYS_I2C
@@ -58,7 +67,6 @@
  * GPIO
  */
 #define CONFIG_LPC32XX_GPIO
-#define CONFIG_CMD_GPIO
 
 /*
  * SSP/SPI
@@ -109,10 +117,23 @@
 #define CONFIG_LPC32XX_NAND_SLC_RHOLD          200000000
 #define CONFIG_LPC32XX_NAND_SLC_RSETUP         50000000
 
+#define CONFIG_SYS_NAND_BLOCK_SIZE             0x20000
+#define CONFIG_SYS_NAND_PAGE_SIZE              NAND_LARGE_BLOCK_PAGE_SIZE
 #define CONFIG_SYS_NAND_USE_FLASH_BBT
+
+#define CONFIG_CMD_JFFS2
 #define CONFIG_CMD_NAND
 
 /*
+ * USB
+ */
+#define CONFIG_USB_OHCI_LPC32XX
+#define CONFIG_USB_ISP1301_I2C_ADDR            0x2d
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_USB
+
+/*
  * U-Boot General Configurations
  */
 #define CONFIG_SYS_LONGHELP
@@ -131,7 +152,6 @@
 /*
  * Pass open firmware flat tree
  */
-#define CONFIG_OF_LIBFDT
 
 /*
  * Environment
@@ -174,6 +194,46 @@
 #define CONFIG_LOADADDR                        0x80008000
 
 /*
+ * SPL specific defines
+ */
+/* SPL will be executed at offset 0 */
+#define CONFIG_SPL_TEXT_BASE           0x00000000
+
+/* SPL will use SRAM as stack */
+#define CONFIG_SPL_STACK               0x0000FFF8
+#define CONFIG_SPL_BOARD_INIT
+
+/* Use the framework and generic lib */
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+
+/* SPL will use serial */
+#define CONFIG_SPL_SERIAL_SUPPORT
+
+/* SPL loads an image from NAND */
+#define CONFIG_SPL_NAND_SIMPLE
+#define CONFIG_SPL_NAND_RAW_ONLY
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_DRIVERS
+
+#define CONFIG_SPL_NAND_ECC
+#define CONFIG_SPL_NAND_SOFTECC
+
+#define CONFIG_SPL_MAX_SIZE            0x20000
+#define CONFIG_SPL_PAD_TO              CONFIG_SPL_MAX_SIZE
+
+/* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
+#define CONFIG_SYS_NAND_U_BOOT_OFFS    0x40000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE    0x60000
+
+#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_DST     CONFIG_SYS_TEXT_BASE
+
+/* See common/spl/spl.c  spl_set_header_raw_uboot() */
+#define CONFIG_SYS_MONITOR_LEN         CONFIG_SYS_NAND_U_BOOT_SIZE
+
+/*
  * Include SoC specific configuration
  */
 #include <asm/arch/config.h>