Convert CONFIG_SYS_I2C_LEGACY to Kconfig and add CONFIG_[ST]PL_SYS_I2C_LEGACY

[platform/kernel/u-boot.git] / include / configs / db-mv784mp-gp.h

diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h
index 567a4a7..ba22fcd 100644 (file)
--- a/include/configs/db-mv784mp-gp.h
+++ b/include/configs/db-mv784mp-gp.h
@@ -16,11 +16,8 @@
  * for DDR ECC byte filling in the SPL before loading the main
  * U-Boot into it.
  */
-#define CONFIG_SYS_TCLK                250000000       /* 250MHz */
 
 /* I2C */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MVTWSI
 #define CONFIG_I2C_MVTWSI_BASE0                MVEBU_TWSI_BASE
 #define CONFIG_SYS_I2C_SLAVE           0x0
 #define CONFIG_SYS_I2C_SPEED           100000
@@ -29,16 +26,8 @@
 #define CONFIG_EHCI_IS_TDI
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 3
 
-/* SPI NOR flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_SPEED                1000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
-
 /* Environment in SPI NOR flash */
-#define CONFIG_ENV_OFFSET              (1 << 20) /* 1MiB in */
-#define CONFIG_ENV_SIZE                        (64 << 10) /* 64KiB */
-#define CONFIG_ENV_SECT_SIZE           (64 << 10) /* 64KiB sectors */
 
-#define CONFIG_PHY_MARVELL             /* there is a marvell phy */
 #define PHY_ANEG_TIMEOUT       8000    /* PHY needs a longer aneg time */
 
 /* SATA support */
@@ -47,12 +36,10 @@
 
 /* PCIe support */
 #ifndef CONFIG_SPL_BUILD
-#define CONFIG_PCI_MVEBU
 #define CONFIG_PCI_SCAN_SHOW
 #endif
 
 /* NAND */
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 
 /*
@@ -76,7 +63,6 @@
 
 /* SPL */
 /* Defines for SPL */
-#define CONFIG_SPL_TEXT_BASE           0x40004030
 #define CONFIG_SPL_MAX_SIZE            ((128 << 10) - 0x4030)
 
 #define CONFIG_SPL_BSS_START_ADDR      (0x40000000 + (128 << 10))
@@ -89,10 +75,6 @@
 #define CONFIG_SPL_STACK               (0x40000000 + ((192 - 16) << 10))
 #define CONFIG_SPL_BOOTROM_SAVE                (CONFIG_SPL_STACK + 4)
 
-/* SPL related SPI defines */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS     0x20000
-#define CONFIG_SYS_U_BOOT_OFFS         CONFIG_SYS_SPI_U_BOOT_OFFS
-
 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
 #define CONFIG_SPD_EEPROM              0x4e
 #define CONFIG_BOARD_ECC_SUPPORT       /* this board supports ECC */