#define SCHMOOGIE
#define CONFIG_SYS_NAND_LARGEPAGE
#define CONFIG_SYS_USE_NAND
+#define CONFIG_DISPLAY_CPUINFO
/*===================*/
/* SoC Configuration */
/*===================*/
#define CONFIG_ARM926EJS /* arm926ejs CPU core */
-#define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */
#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
#define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */
#define CONFIG_SYS_HZ 1000
+#define CONFIG_SOC_DM644X
/*=============*/
/* Memory Info */
/*=============*/
/*====================*/
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 4 /* NS16550 register size */
+#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */
#define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */
-#define CONFIG_SYS_NS16550_CLK 27000000 /* Input clock to NS16550 */
+#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK /* Input clock to NS16550 */
#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_NET_MULTI
/*=====================*/
/* Flash & Environment */
/*=====================*/
#define CONFIG_SYS_NAND_HW_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
/*=====================*/
/* Board related stuff */
/*=====================*/