fsl_esdhc: Add the workaround for erratum ESDHC111 (enable on P4080)

[platform/kernel/u-boot.git] / include / configs / davinci_dm6467evm.h

diff --git a/include/configs/davinci_dm6467evm.h b/include/configs/davinci_dm6467evm.h
index ddc5990..3ef4555 100644 (file)
--- a/include/configs/davinci_dm6467evm.h
+++ b/include/configs/davinci_dm6467evm.h
@@ -24,7 +24,6 @@
 #define DAVINCI_DM6467EVM
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SKIP_RELOCATE_UBOOT
 
 /* SoC Configuration */
 #define CONFIG_ARM926EJS                               /* arm926ejs CPU */
@@ -41,7 +40,6 @@
 
 /* Memory Info */
 #define CONFIG_SYS_MALLOC_LEN          (1 << 20)       /* 1 MiB */
-#define CONFIG_SYS_GBL_DATA_SIZE       128             /* initial data */
 #define CONFIG_SYS_MEMTEST_START       0x80000000
 #define CONFIG_SYS_MEMTEST_END         0x81000000      /* 16MB RAM test */
 #define CONFIG_NR_DRAM_BANKS           1
@@ -128,4 +126,12 @@
 #define CONFIG_CMD_NAND
 #endif
 
+#define CONFIG_MAX_RAM_BANK_SIZE       (256 << 20)     /* 256 MB */
+
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_SIZE       0x1000
+#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_SDRAM_BASE + \
+                                        CONFIG_SYS_INIT_RAM_SIZE - \
+                                        GENERATED_GBL_DATA_SIZE)
+
 #endif /* __CONFIG_H */