pci: introduce CONFIG_PCI_INDIRECT_BRIDGE option

[platform/kernel/u-boot.git] / include / configs / csb472.h

diff --git a/include/configs/csb472.h b/include/configs/csb472.h
index 71eb083..f6a456c 100644 (file)
--- a/include/configs/csb472.h
+++ b/include/configs/csb472.h
@@ -40,6 +40,8 @@
 #define CONFIG_LAST_STAGE_INIT 1       /* Call last_stage_init()       */
 #define CONFIG_SYS_CLK_FREQ     25000000 /* external frequency to pll   */
 
+#define        CONFIG_SYS_TEXT_BASE    0xFFFC0000
+
 /*
  * OS Bootstrap configuration
  *
@@ -120,9 +122,6 @@
  *
  */
 #undef CONFIG_SYS_HUSH_PARSER                  /* use "hush" command parser */
-#ifdef CONFIG_SYS_HUSH_PARSER
-#define        CONFIG_SYS_PROMPT_HUSH_PS2      "> "    /* hush shell secondary prompt */
-#endif
 
 #define CONFIG_SYS_LONGHELP                    /* undef to save memory */
 #define CONFIG_SYS_PROMPT              "=> "   /* Monitor Command Prompt */
@@ -159,6 +158,12 @@
  * UART configuration
  *
  */
+#define CONFIG_CONS_INDEX              1       /* Use UART0            */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE    1
+#define CONFIG_SYS_NS16550_CLK         get_serial_clock()
+
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK             /* use internal serial clock */
 #define CONFIG_SYS_BASE_BAUD           691200
 #define CONFIG_BAUDRATE                38400   /* Default baud rate */
@@ -184,7 +189,6 @@
 #define CONFIG_PHY_CMD_DELAY   40      /* PHY COMMAND delay            */
                                        /* 32usec min. for LXT971A      */
 #define CONFIG_PHY_RESET_DELAY 300     /* PHY RESET recovery delay     */
-#define CONFIG_NET_MULTI
 
 /*
  * RTC configuration
@@ -199,6 +203,7 @@
  *
  */
 #define CONFIG_PCI                     /* include pci support          */
+#define CONFIG_PCI_INDIRECT_BRIDGE     /* indirect PCI bridge support */
 #define PCI_HOST_ADAPTER       0       /* configure ar pci adapter     */
 #define PCI_HOST_FORCE         1       /* configure as pci host        */
 #define PCI_HOST_AUTO          2       /* detected via arbiter enable  */
@@ -244,7 +249,7 @@
 #define CONFIG_SYS_SDRAM_BASE          0x00000000
 #define CONFIG_SYS_FLASH_BASE          0xFF800000
 #define CONFIG_SYS_FLASH_SIZE          0x00800000
-#define CONFIG_SYS_MONITOR_BASE        TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_MONITOR_LEN         (256 * 1024) /* Reserve 256 KB for Monitor */
 #define CONFIG_SYS_MALLOC_LEN          (128 * 1024) /* Reserve 128 KB for malloc() */
 
@@ -284,9 +289,8 @@
  *
  */
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_OCM_DATA_ADDR /* inside of on-chip SRAM */
-#define CONFIG_SYS_INIT_RAM_END        CONFIG_SYS_OCM_DATA_SIZE /* End of used area in RAM */
-#define CONFIG_SYS_GBL_DATA_SIZE       128 /* byte size reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE       CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM */
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 /*
@@ -295,13 +299,4 @@
  */
 #define CONFIG_I2CFAST         1       /* enable "i2cfast" env. setting     */
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- *
- */
-#define BOOTFLAG_COLD          0x01    /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM          0x02    /* Software reboot */
-
 #endif /* __CONFIG_H */