Merge branch 'master' of /home/stefan/git/u-boot/u-boot into next
[platform/kernel/u-boot.git] / include / configs / csb272.h
index ac1cead..5145c00 100644 (file)
@@ -33,7 +33,7 @@
  * (easy to change)
  */
 
-#define CONFIG_405GP           1       /* This is a PPC405GP CPU       */
+#define CONFIG_405GP           1       /* This is a PPC405GP CPU       */
 #define CONFIG_4xx             1       /* ...member of PPC4xx family   */
 #define CONFIG_CSB272          1       /* on a Cogent CSB272 board     */
 #define CONFIG_BOARD_EARLY_INIT_F 1    /* Call board_early_init_f()    */
@@ -58,7 +58,7 @@
 #define CONFIG_BOOTCOMMAND \
        "setenv bootargs console=ttyS0,38400 debug " \
        "root=/dev/ram rw ramdisk_size=4096 " \
-       "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off; " \
+       "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \
        "bootm fe000000 fe100000"
 #endif
 
 #define CONFIG_BOOTCOMMAND \
        "bootp; " \
        "setenv bootargs console=ttyS0,38400 debug " \
-       "root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) " \
-       "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off; " \
+       "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
+       "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \
        "bootm"
 #endif
 
 /*
- * BOOTP/DHCP protocol configuration
- *
+ * BOOTP options
  */
-#define CONFIG_BOOTP_MASK      ( CONFIG_BOOTP_DEFAULT          | \
-                                 CONFIG_BOOTP_DNS2             | \
-                                 CONFIG_BOOTP_BOOTFILESIZE     )
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_DNS2
+
+
 /*
- * U-Boot Monitor Command Line Functions Configuration
- *
+ * Command line configuration.
  */
-#define CONFIG_COMMANDS                ( CONFIG_CMD_DFL        | \
-                                 CFG_CMD_ASKENV        | \
-                                 CFG_CMD_BEDBUG        | \
-                                 CFG_CMD_ELF           | \
-                                 CFG_CMD_IRQ           | \
-                                 CFG_CMD_I2C           | \
-                                 CFG_CMD_PCI           | \
-                                 CFG_CMD_DATE          | \
-                                 CFG_CMD_MII           | \
-                                 CFG_CMD_PING          | \
-                                 CFG_CMD_DHCP           )
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+
 
 /*
  * Serial download configuration
  * KGDB Configuration
  *
  */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */
 #endif
 
 #define CFG_LONGHELP                   /* undef to save memory */
 #define CFG_PROMPT             "=> "   /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define        CFG_CBSIZE              1024    /* Console I/O Buffer Size */
 #else
 #define        CFG_CBSIZE              256     /* Console I/O Buffer Size */
  */
 #define CONFIG_MII             1       /* MII PHY management           */
 #define CONFIG_PHY_ADDR                0       /* PHY address                  */
-#define CONFIG_PHY_CMD_DELAY   40      /* PHY COMMAND delay            */
+#define CONFIG_PHY_CMD_DELAY   40      /* PHY COMMAND delay            */
                                        /* 32usec min. for LXT971A      */
 #define CONFIG_PHY_RESET_DELAY 300     /* PHY RESET recovery delay     */
 
  *
  */
 #define CFG_FLASH_CFI          1       /* flash is CFI conformant      */
-#define CFG_FLASH_CFI_DRIVER   1       /* use common cfi driver        */
+#define CONFIG_FLASH_CFI_DRIVER        1       /* use common cfi driver        */
 #define CFG_FLASH_USE_BUFFER_WRITE 1   /* use buffered writes (20x faster) */
 #define CFG_MAX_FLASH_BANKS    1       /* max # of memory banks        */
 #define CFG_FLASH_INCREMENT    0       /* there is only one bank       */
 #define CFG_INIT_SP_OFFSET     CFG_GBL_DATA_OFFSET
 
 /*
- * Cache configuration
- *
- */
-#define CFG_DCACHE_SIZE                16384   /* For IBM 405 CPUs, older 405 ppc's */
-                                       /* have only 8kB, 16kB is save here  */
-#define CFG_CACHELINE_SIZE     32
-
-/*
  * Miscellaneous board specific definitions
  *
  */