qong: enable support for compressed images

[platform/kernel/u-boot.git] / include / configs / cradle.h

diff --git a/include/configs/cradle.h b/include/configs/cradle.h
index d1c1a48..25be616 100644 (file)
--- a/include/configs/cradle.h
+++ b/include/configs/cradle.h
@@ -38,18 +38,16 @@
 #undef CONFIG_USE_IRQ                   /* we don't need IRQ/FIQ stuff */
 
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
-
+#define CONFIG_SYS_DCACHE_OFF
+#define        CONFIG_SYS_TEXT_BASE            0x0
 /*
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 128*1024)
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
 
 /*
  * Hardware drivers
  */
-#define CONFIG_NET_MULTI
 #define CONFIG_SMC91111
 #define CONFIG_SMC91111_BASE 0x10000300
 #define CONFIG_SMC91111_EXT_PHY
@@ -126,15 +124,9 @@
 /*
  * Physical Memory Map
  */
-#define CONFIG_NR_DRAM_BANKS    4          /* we have 2 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS    1          /* we have 1 bank of DRAM */
 #define PHYS_SDRAM_1            0xa0000000 /* SDRAM Bank #1 */
 #define PHYS_SDRAM_1_SIZE       0x01000000 /* 64 MB */
-#define PHYS_SDRAM_2            0xa4000000 /* SDRAM Bank #2 */
-#define PHYS_SDRAM_2_SIZE       0x00000000 /* 0 MB */
-#define PHYS_SDRAM_3            0xa8000000 /* SDRAM Bank #3 */
-#define PHYS_SDRAM_3_SIZE       0x00000000 /* 0 MB */
-#define PHYS_SDRAM_4            0xac000000 /* SDRAM Bank #4 */
-#define PHYS_SDRAM_4_SIZE       0x00000000 /* 0 MB */
 
 #define PHYS_FLASH_1            0x00000000 /* Flash Bank #1 */
 #define PHYS_FLASH_2            0x04000000 /* Flash Bank #1 */
@@ -146,7 +138,7 @@
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 
 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
-#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+#define        CONFIG_SYS_INIT_SP_ADDR         (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1)
 
 /*
  * FLASH and environment organization
@@ -289,9 +281,9 @@
  * Clocks, power control and interrupts
  */
 #define CONFIG_SYS_PSSR_VAL        0x00000020
-#define CONFIG_SYS_CCCR_VAL        0x00000141  /* 100 MHz memory, 200 MHz CPU  */
-#define CONFIG_SYS_CKEN_VAL        0x00000060  /* FFUART and STUART enabled    */
-#define CONFIG_SYS_ICMR_VAL        0x00000000  /* No interrupts enabled        */
+#define CONFIG_SYS_CCCR        0x00000141  /* 100 MHz memory, 200 MHz CPU  */
+#define CONFIG_SYS_CKEN        0x00000060  /* FFUART and STUART enabled    */
+#define CONFIG_SYS_ICMR        0x00000000  /* No interrupts enabled        */
 
 /* FIXME
  *
@@ -319,6 +311,8 @@
 #define CONFIG_SYS_MDMRS_VAL       0x00000000
 #define CONFIG_SYS_MDREFR_VAL      0x00403018  /* Initial setting, individual bits set in lowlevel_init.S */
 #endif
+#define        CONFIG_SYS_FLYCNFG_VAL          0x00000000
+#define        CONFIG_SYS_SXCNFG_VAL           0x00000000
 
 /*
  * PCMCIA and CF Interfaces (NOT USED, these values from lubbock init)