/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
-#define CONFIG_AT91_GPIO
#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
/* serial console */
#define CONFIG_BOOTP_BOOTFILESIZE
/* SDRAM */
-#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
#define CONFIG_SYS_SDRAM_SIZE 0x08000000
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
+#define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
#endif
/* Ethernet */
#define CONFIG_SYS_LOAD_ADDR ATMEL_BASE_CS6
/* bootstrap + u-boot + env in nandflash */
-#define CONFIG_ENV_OFFSET 0x100000
-#define CONFIG_ENV_OFFSET_REDUND 0x180000
-#define CONFIG_ENV_SIZE SZ_128K
#define CONFIG_BOOTCOMMAND \
"nand read 0x70000000 0x200000 0x300000;" \
SZ_4M, 0x1000)
/* Defines for SPL */
-#define CONFIG_SPL_TEXT_BASE 0x300000
#define CONFIG_SPL_MAX_SIZE (12 * SZ_1K)
#define CONFIG_SPL_STACK (SZ_16K)
#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
#define CONFIG_SPL_BSS_MAX_SIZE (SZ_2K)
-#define CONFIG_SPL_NAND_DRIVERS
-#define CONFIG_SPL_NAND_BASE
-#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_NAND_RAW_ONLY
#define CONFIG_SPL_NAND_SOFTECC
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_MCKR 0x1301
#define CONFIG_SYS_MCKR_CSS 0x1302
+#define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS
+#define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO
+
#endif