global: Convert CONFIG_LOADADDR to CONFIG_SYS_LOADADDR

[platform/kernel/u-boot.git] / include / configs / corenet_ds.h

diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index a49f905..1919002 100644 (file)
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -59,12 +59,9 @@
 #define CONFIG_PCIE2                   /* PCIE controller 2 */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */
 
-#define CONFIG_ENV_OVERWRITE
-
 #if defined(CONFIG_SPIFLASH)
 #elif defined(CONFIG_SDCARD)
 #define CONFIG_FSL_FIXED_MMC_LOCATION
-#define CONFIG_SYS_MMC_ENV_DEV          0
 #endif
 
 #define CONFIG_SYS_CLK_FREQ    get_board_sys_clk() /* sysclk for MPC85xx */
@@ -76,19 +73,12 @@
 #define CONFIG_BACKSIDE_L2_CACHE
 #define CONFIG_SYS_INIT_L2CSR0         L2CSR0_L2E
 #define CONFIG_BTB                     /* toggle branch predition */
-#define        CONFIG_DDR_ECC
 #ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
 #endif
 
 #define CONFIG_ENABLE_36BIT_PHYS
 
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_ADDR_MAP
-#define CONFIG_SYS_NUM_ADDR_MAP                64      /* number of TLB1 entries */
-#endif
-
 #define CONFIG_POST CONFIG_SYS_POST_MEMORY     /* test POST memory test */
 
 /*
@@ -109,11 +99,8 @@
 #endif
 
 /* EEPROM */
-#define CONFIG_ID_EEPROM
 #define CONFIG_SYS_I2C_EEPROM_NXID
 #define CONFIG_SYS_EEPROM_BUS_NUM      0
-#define CONFIG_SYS_I2C_EEPROM_ADDR     0x57
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 
 /*
  * DDR Setup
@@ -125,8 +112,6 @@
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
-#define CONFIG_DDR_SPD
-
 #define CONFIG_SYS_SPD_BUS_NUM 1
 #define SPD_EEPROM_ADDRESS1    0x51
 #define SPD_EEPROM_ADDRESS2    0x52
@@ -277,19 +262,6 @@
 #define CONFIG_SYS_NS16550_COM4        (CONFIG_SYS_CCSRBAR+0x11D600)
 
 /* I2C */
-#ifndef CONFIG_DM_I2C
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_FSL_I2C_SPEED       400000
-#define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET      0x118000
-#define CONFIG_SYS_FSL_I2C2_SPEED      400000
-#define CONFIG_SYS_FSL_I2C2_SLAVE      0x7F
-#define CONFIG_SYS_FSL_I2C2_OFFSET     0x118100
-#else
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER  0
-#endif
-#define CONFIG_SYS_I2C_FSL
 
 /*
  * RapidIO
@@ -438,27 +410,6 @@
 #define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
 #ifdef CONFIG_PCI
-#if !defined(CONFIG_DM_PCI)
-#define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
-#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_SYS_PCIE1_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE1_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE1_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE1_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE2_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE2_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE2_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE2_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE3_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE3_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE3_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE3_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE4_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE4_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE4_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE4_IO_SIZE       0x00010000      /* 64k */
-#endif
-
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
 #endif /* CONFIG_PCI */
 
@@ -538,9 +489,6 @@
 #define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_UBOOTPATH       u-boot.bin      /* U-Boot image on TFTP server */
 
-/* default location for tftp and bootm */
-#define CONFIG_LOADADDR                1000000
-
 #ifdef CONFIG_TARGET_P4080DS
 #define __USB_PHY_TYPE ulpi
 #else
@@ -568,14 +516,14 @@
        "fdtfile=p4080ds/p4080ds.dtb\0"                         \
        "bdev=sda3\0"
 
-#define CONFIG_HDBOOT                                  \
+#define HDBOOT                                 \
        "setenv bootargs root=/dev/$bdev rw "           \
        "console=$consoledev,$baudrate $othbootargs;"   \
        "tftp $loadaddr $bootfile;"                     \
        "tftp $fdtaddr $fdtfile;"                       \
        "bootm $loadaddr - $fdtaddr"
 
-#define CONFIG_NFSBOOTCOMMAND                  \
+#define NFSBOOTCOMMAND                 \
        "setenv bootargs root=/dev/nfs rw "     \
        "nfsroot=$serverip:$rootpath "          \
        "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
@@ -584,7 +532,7 @@
        "tftp $fdtaddr $fdtfile;"               \
        "bootm $loadaddr - $fdtaddr"
 
-#define CONFIG_RAMBOOTCOMMAND                          \
+#define RAMBOOTCOMMAND                         \
        "setenv bootargs root=/dev/ram rw "             \
        "console=$consoledev,$baudrate $othbootargs;"   \
        "tftp $ramdiskaddr $ramdiskfile;"               \
@@ -592,7 +540,7 @@
        "tftp $fdtaddr $fdtfile;"                       \
        "bootm $loadaddr $ramdiskaddr $fdtaddr"
 
-#define CONFIG_BOOTCOMMAND             CONFIG_HDBOOT
+#define CONFIG_BOOTCOMMAND             HDBOOT
 
 #include <asm/fsl_secure_boot.h>