/* High Level Configuration Options */
#define CONFIG_CONTROLCENTERD
-#define CONFIG_MP /* support multiple processors */
#define CONFIG_ENABLE_36BIT_PHYS
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
-#ifndef CONFIG_TRAILBLAZER
-#endif
-
#define CONFIG_PCA9698 /* NXP PCA9698 */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-#ifndef CONFIG_TRAILBLAZER
-/*
- * eSPI - Enhanced SPI
- */
-#define CONFIG_HARD_SPI
-
-#define CONFIG_SF_DEFAULT_SPEED 10000000
-#define CONFIG_SF_DEFAULT_MODE 0
-#endif
-
/*
* MMC
*/
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
-#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_SYS_PCIE1_MEM_VIRT 0xc0000000
#ifdef CONFIG_PHYS_64BIT
#define CONFIG_TSECV2
-#define CONFIG_MII /* MII PHY management */
#define CONFIG_TSEC1 1
#define CONFIG_TSEC1_NAME "eTSEC1"
#define CONFIG_TSEC2 1
#if defined(CONFIG_TRAILBLAZER)
#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
#elif defined(CONFIG_RAMBOOT_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS 0
-#define CONFIG_ENV_SPI_CS 0
-#define CONFIG_ENV_SPI_MAX_HZ 10000000
-#define CONFIG_ENV_SPI_MODE 0
#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */
#define CONFIG_ENV_SECT_SIZE 0x10000
#define CONFIG_SYS_MMC_ENV_DEV 0
#endif
-#define CONFIG_SYS_EXTRA_ENV_RELOC
-
/*
* Command line configuration.
*/
/*
* Board initialisation callbacks
*/
-#define CONFIG_MISC_INIT_R
#endif /* CONFIG_TRAILBLAZER */
/*
#else
-#define CONFIG_HOSTNAME controlcenterd
+#define CONFIG_HOSTNAME "controlcenterd"
#define CONFIG_ROOTPATH "/opt/nfsroot"
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP */