+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2011 CompuLab, Ltd.
* Mike Rapoport <mike@compulab.co.il>
* Syed Mohammed Khasim <x0khasim@ti.com>
*
* Configuration settings for the CompuLab CM-T35 and CM-T3730 boards
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define V_OSCK 26000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK >> 1)
-#define CONFIG_MISC_INIT_R
-
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/*
* Size of malloc() pool
*/
-#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
/* Sector */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
/*
* select serial console configuration
*/
-#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
-#define CONFIG_SERIAL3 3 /* UART3 */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_USB_TTY
/* commands to include */
-#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
-#define CONFIG_MTD_PARTITIONS
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
/*
* TWL4030
*/
-#define CONFIG_TWL4030_LED
/*
* Board NAND Info.
*/
-#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
- /* to access nand */
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
/* to access nand at */
/* CS0 */
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
-#define CONFIG_NR_DRAM_BANKS 1 /* CS1 is never populated */
#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
/*-----------------------------------------------------------------------
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
-#define CONFIG_ENV_OFFSET 0x260000
#define CONFIG_ENV_ADDR 0x260000
/* additions for new relocation code, must be added to all boards */
#define CONFIG_SPLASHIMAGE_GUARD
/* Display Configuration */
-#define CONFIG_VIDEO_OMAP3
#define LCD_BPP LCD_COLOR16
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
-#define CONFIG_SPL_TEXT_BASE 0x40200800
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
CONFIG_SPL_TEXT_BASE)