#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
/* Network */
-#define CONFIG_FEC_XCV_TYPE RGMII
-#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 0
/* ENET1 */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* SPI Flash support */
/* FLASH and environment organization */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
#define CONFIG_SYS_FSL_USDHC_NUM 2
-#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
#endif
/* USB Configs */
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
/* SPL */
#include "imx7_spl.h"