global: Migrate CONFIG_STACKBASE to CFG

[platform/kernel/u-boot.git] / include / configs / cl-som-imx7.h

diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h
index 6e47b5b..280ae1e 100644 (file)
--- a/include/configs/cl-som-imx7.h
+++ b/include/configs/cl-som-imx7.h
@@ -10,42 +10,23 @@
 
 #include "mx7_common.h"
 
-#define CONFIG_MXC_UART_BASE            UART1_IPS_BASE_ADDR
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN          (32 * SZ_1M)
+#define CFG_MXC_UART_BASE            UART1_IPS_BASE_ADDR
 
 /* Network */
-#define CONFIG_FEC_MXC
-#define CONFIG_FEC_XCV_TYPE             RGMII
-#define CONFIG_ETHPRIME                 "FEC"
-#define CONFIG_FEC_MXC_PHYADDR          0
+#define CFG_FEC_MXC_PHYADDR          0
 
 /* ENET1 */
 #define IMX_FEC_BASE                   ENET_IPS_BASE_ADDR
 
 /* PMIC */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
-#define CONFIG_POWER_PFUZE3000
-#define CONFIG_POWER_PFUZE3000_I2C_ADDR        0x08
-
-/* I2C configs */
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C2                /* Enable I2C bus 2 */
+#define CFG_POWER_PFUZE3000_I2C_ADDR   0x08
 
-#define CONFIG_PCA953X
-#define CONFIG_SYS_I2C_PCA953X_ADDR    0x20
-#define CONFIG_SYS_I2C_PCA953X_WIDTH   { {0x20, 16} }
+#define CFG_SYS_I2C_PCA953X_ADDR       0x20
+#define CFG_SYS_I2C_PCA953X_WIDTH      { {0x20, 16} }
 
-#undef CONFIG_SYS_AUTOLOAD
-#undef CONFIG_EXTRA_ENV_SETTINGS
-#undef CONFIG_BOOTCOMMAND
+#undef CFG_EXTRA_ENV_SETTINGS
 
-#define CONFIG_SYS_AUTOLOAD            "no"
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
-       "autoload=off\0" \
+#define CFG_EXTRA_ENV_SETTINGS \
        "script=boot.scr\0" \
        "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0" \
        "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0" \
@@ -60,7 +41,7 @@
        "fdtaddr=0x83000000\0" \
        "mmcdev_def="__stringify(CONFIG_SYS_MMC_DEV)"\0" \
        "usbdev_def="__stringify(CONFIG_SYS_USB_DEV)"\0" \
-       "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+       "mmcpart=1\0" \
        "usbpart=" __stringify(CONFIG_SYS_USB_IMG_LOAD_PART) "\0" \
        "doboot=bootz ${loadaddr} - ${fdtaddr}\0" \
        "mmc_config=mmc dev ${mmcdev}; mmc rescan\0" \
@@ -96,25 +77,12 @@
        "emmcbootscript=setenv mmcdev 1; setenv mmcblk 2; run mmcbootscript\0" \
        "emmcboot=setenv mmcdev 1; setenv mmcblk 2; run mmcboot\0" \
 
-#define CONFIG_BOOTCOMMAND \
-       "echo SD boot attempt ...; run sdbootscript; run sdboot; " \
-       "echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; " \
-       "echo USB boot attempt ...; run usbbootscript; "
-
-#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
-#define CONFIG_SYS_HZ                  1000
-
 /* Physical Memory Map */
 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
 
-#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
-#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
-       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-       (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+#define CFG_SYS_SDRAM_BASE             PHYS_SDRAM
+#define CFG_SYS_INIT_RAM_ADDR  IRAM_BASE_ADDR
+#define CFG_SYS_INIT_RAM_SIZE  IRAM_SIZE
 
 /* SPI Flash support */
 
@@ -122,19 +90,13 @@
 
 /* MMC Config*/
 #ifdef CONFIG_FSL_USDHC
-#define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC1_BASE_ADDR
+#define CFG_SYS_FSL_ESDHC_ADDR       USDHC1_BASE_ADDR
 
-#define CONFIG_SYS_FSL_USDHC_NUM       2
-#define CONFIG_MMCROOT                 "/dev/mmcblk0p2" /* USDHC1 */
+#define CFG_SYS_FSL_USDHC_NUM  2
 #endif
 
 /* USB Configs */
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CONFIG_MXC_USB_FLAGS   0
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-
-/* SPL */
-#include "imx7_spl.h"
+#define CFG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CFG_MXC_USB_FLAGS   0
 
 #endif /* __CONFIG_H */