global: Convert CONFIG_LOADADDR to CONFIG_SYS_LOADADDR

[platform/kernel/u-boot.git] / include / configs / capricorn-common.h

diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h
index 254b3a5..bca995e 100644 (file)
--- a/include/configs/capricorn-common.h
+++ b/include/configs/capricorn-common.h
@@ -20,7 +20,6 @@
 #define CONFIG_SYS_MONITOR_LEN         (1024 * 1024)
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR                0x800
-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION             0
 
 #define CONFIG_SPL_LDSCRIPT            "arch/arm/cpu/armv8/u-boot-spl.lds"
 #define CONFIG_SPL_STACK               0x013E000
@@ -42,20 +41,8 @@
 
 #define CONFIG_REMAKE_ELF
 
-#define CONFIG_BOARD_EARLY_INIT_F
-
-/* Commands */
-#define CONFIG_CMD_READ
-
-#undef CONFIG_CMD_EXPORTENV
-#undef CONFIG_CMD_IMPORTENV
-#undef CONFIG_CMD_IMLS
-#undef CONFIG_CMD_CRC32
-#undef CONFIG_BOOTM_NETBSD
-
 /* ENET Config */
 #define CONFIG_FEC_XCV_TYPE            RMII
-#define FEC_QUIRK_ENET_MAC
 
 /* ENET1 connects to base board and MUX with ESAI */
 #define CONFIG_FEC_ENET_DEV            1
@@ -64,7 +51,6 @@
 
 /* I2C Configuration */
 #ifndef CONFIG_SPL_BUILD
-#define CONFIG_SYS_I2C_SPEED   400000
 /* EEPROM */
 #define  EEPROM_I2C_BUS                0 /* I2C0 */
 #define  EEPROM_I2C_ADDR       0x50
@@ -141,18 +127,9 @@
        "reset;"
 
 /* Default location for tftp and bootm */
-#define CONFIG_LOADADDR                        0x80280000
-#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
+#define CONFIG_SYS_LOAD_ADDR                   0x80280000
 #define CONFIG_SYS_INIT_SP_ADDR                0x80200000
 
-#define CONFIG_BOOTCOUNT_LIMIT
-#define CONFIG_BOOTCOUNT_ENV
-
-/* Environment organisation */
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_SYS_MMC_ENV_DEV         0       /* USDHC1, eMMC */
-#define CONFIG_SYS_MMC_ENV_PART                2       /* 2nd boot partition */
-
 /* On CCP board, USDHC1 is for eMMC */
 #define CONFIG_MMCROOT                 "/dev/mmcblk0p2"  /* eMMC */
 #define CONFIG_SYS_MMC_IMG_LOAD_PART   1
@@ -167,10 +144,6 @@
 #define PHYS_SDRAM_1_SIZE              0x40000000      /* 1 GB */
 #define PHYS_SDRAM_2_SIZE              0x00000000      /* 0 GB */
 
-#define CONFIG_SYS_MEMTEST_START       0xA0000000
-#define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_MEMTEST_START + \
-                                        (PHYS_SDRAM_1_SIZE >> 2))
-
 /* Console buffer and boot args */
 #define CONFIG_SYS_CBSIZE              2048
 #define CONFIG_SYS_MAXARGS             64