ppc: Remove MPC8313ERDB boards

[platform/kernel/u-boot.git] / include / configs / caddy2.h

diff --git a/include/configs/caddy2.h b/include/configs/caddy2.h
index ffd52a2..78891fe 100644 (file)
--- a/include/configs/caddy2.h
+++ b/include/configs/caddy2.h
@@ -25,11 +25,7 @@
 /* Don't enable PCI2 on vme834x - it doesn't exist physically. */
 #undef CONFIG_MPC83XX_PCI2             /* support for 2nd PCI controller */
 
-#define CONFIG_SYS_IMMR                0xE0000000
-
 #undef CONFIG_SYS_DRAM_TEST                    /* memory test, takes time */
-#define CONFIG_SYS_MEMTEST_START       0x00000000      /* memtest region */
-#define CONFIG_SYS_MEMTEST_END         0x00100000
 
 /*
  * DDR Setup
@@ -53,9 +49,7 @@
  */
 #undef CONFIG_DDR_32BIT
 
-#define CONFIG_SYS_DDR_BASE            0x00000000      /* DDR is sys memory*/
-#define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_BASE
-#define CONFIG_SYS_DDR_SDRAM_BASE      CONFIG_SYS_DDR_BASE
+#define CONFIG_SYS_SDRAM_BASE          0x00000000      /* DDR is sys memory*/
 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL  (DDR_SDRAM_CLK_CNTL_SS_EN \
                                        | DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075)
 #define CONFIG_DDR_2T_TIMING
@@ -69,31 +63,10 @@
  */
 #define CONFIG_SYS_FLASH_BASE          0xffc00000      /* start of FLASH   */
 #define CONFIG_SYS_FLASH_SIZE          4               /* flash size in MB */
-#define CONFIG_SYS_BR0_PRELIM          (CONFIG_SYS_FLASH_BASE | \
-                                        BR_PS_16 |     /*  16bit */ \
-                                        BR_MS_GPCM |   /*  MSEL = GPCM */ \
-                                        BR_V)          /* valid */
-
-#define CONFIG_SYS_OR0_PRELIM          (OR_AM_4MB \
-                                       | OR_GPCM_XAM \
-                                       | OR_GPCM_CSNT \
-                                       | OR_GPCM_ACS_DIV2 \
-                                       | OR_GPCM_XACS \
-                                       | OR_GPCM_SCY_15 \
-                                       | OR_GPCM_TRLX_SET \
-                                       | OR_GPCM_EHTR_SET \
-                                       | OR_GPCM_EAD)
-                                       /* 0xffc06ff7 */
+
 
 #define CONFIG_SYS_WINDOW1_BASE                0xf0000000
-#define CONFIG_SYS_BR1_PRELIM          (CONFIG_SYS_WINDOW1_BASE \
-                                       | BR_PS_32 \
-                                       | BR_MS_GPCM \
-                                       | BR_V)
-                                       /* 0xF0001801 */
-#define CONFIG_SYS_OR1_PRELIM          (OR_AM_256KB \
-                                       | OR_GPCM_SETA)
-                                       /* 0xfffc0208 */
+
 
 #define CONFIG_SYS_MAX_FLASH_BANKS     1       /* number of banks */
 #define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device*/
@@ -121,15 +94,6 @@
 #define CONFIG_SYS_MONITOR_LEN         (256 * 1024)    /* Reserve 256 kB */
 #define CONFIG_SYS_MALLOC_LEN          (256 * 1024)    /* Malloc size */
 
-/*
- * Local Bus LCRR and LBCR regs
- *    LCRR:  no DLL bypass, Clock divider is 4
- * External Local Bus rate is
- *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
- */
-#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
-#define CONFIG_SYS_LBC_LBCR    0x00000000
-
 #undef CONFIG_SYS_LB_SDRAM     /* if board has SDRAM on local bus */
 
 /*
@@ -191,8 +155,6 @@
 
 #if defined(CONFIG_PCI)
 
-#undef CONFIG_EEPRO100
-#undef CONFIG_TULIP
 
 #if !defined(CONFIG_PCI_PNP)
        #define PCI_ENET0_IOADDR        0xFIXME
@@ -233,17 +195,7 @@
  * Environment
  */
 #ifndef CONFIG_SYS_RAMBOOT
-       #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE + 0xc0000)
-       #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K(one sector) for env */
-       #define CONFIG_ENV_SIZE         0x2000
-
 /* Address and size of Redundant Environment Sector    */
-#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
-
-#else
-       #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
-       #define CONFIG_ENV_SIZE         0x2000
 #endif
 
 #define CONFIG_LOADS_ECHO              /* echo on for serial download */
@@ -254,12 +206,8 @@
  */
 #define CONFIG_BOOTP_BOOTFILESIZE
 
-/*
- * Command line configuration.
- */
 #define CONFIG_SYS_RTC_BUS_NUM  0x01
 #define CONFIG_SYS_I2C_RTC_ADDR        0x32
-#define CONFIG_RTC_RX8025
 
 /* Pass Ethernet MAC to VxWorks */
 #define CONFIG_SYS_VXWORKS_MAC_PTR     0x000043f0
@@ -284,12 +232,6 @@
 #define CONFIG_SYS_SICRH 0
 #define CONFIG_SYS_SICRL SICRL_LDP_A
 
-#define CONFIG_SYS_HID0_INIT   0x000000000
-#define CONFIG_SYS_HID0_FINAL  (HID0_ENABLE_MACHINE_CHECK | \
-                                HID0_ENABLE_INSTRUCTION_CACHE)
-
-#define CONFIG_SYS_HID2                HID2_HBE
-
 #define CONFIG_SYS_GPIO1_PRELIM
 #define CONFIG_SYS_GPIO1_DIR   0x00100000
 #define CONFIG_SYS_GPIO1_DAT   0x00100000
@@ -309,7 +251,6 @@
 /*
  * Environment Configuration
  */
-#define CONFIG_ENV_OVERWRITE
 
 #if defined(CONFIG_TSEC_ENET)
 #define CONFIG_HAS_ETH0