/* CPU Options
* Be sure to set the Silicon Revision Correctly
*/
-#define CONFIG_BFIN_CPU bf532-0.5
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/*
* Board settings
*/
-#define CONFIG_DRIVER_SMC91111 1
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111 1
#define CONFIG_SMC91111_BASE 0x20300300
/* FLASH/ETHERNET uses the same address range
* Network settings
*/
-#ifdef CONFIG_DRIVER_SMC91111
+#ifdef CONFIG_SMC91111
#define CONFIG_IPADDR 192.168.0.15
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_GATEWAYIP 192.168.0.1
#endif
#define CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_OFFSET 0x4000
+#define CONFIG_ENV_OFFSET 0x40000
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_ENV_SECT_SIZE 0x40000
-#define ENV_IS_EMBEDDED_CUSTOM
/*
* SDRAM settings & memory map
#include <config_cmd_default.h>
-#ifdef CONFIG_DRIVER_SMC91111
+#ifdef CONFIG_SMC91111
# define CONFIG_CMD_DHCP
# define CONFIG_CMD_PING
#else
* them yet. You can (and probably should) change these values!
*/
#ifdef CONFIG_SOFT_I2C
-
-#define PF_SCL PF9
-#define PF_SDA PF8
-
-#define I2C_INIT do { *pFIO_DIR |= PF_SCL; SSYNC(); } while (0)
-#define I2C_ACTIVE do { *pFIO_DIR |= PF_SDA; *pFIO_INEN &= ~PF_SDA; SSYNC(); } while (0)
-#define I2C_TRISTATE do { *pFIO_DIR &= ~PF_SDA; *pFIO_INEN |= PF_SDA; SSYNC(); } while (0)
-#define I2C_READ ((*pFIO_FLAG_D & PF_SDA) != 0)
-#define I2C_SDA(bit) \
- do { \
- if (bit) \
- *pFIO_FLAG_S = PF_SDA; \
- else \
- *pFIO_FLAG_C = PF_SDA; \
- SSYNC(); \
- } while (0)
-#define I2C_SCL(bit) \
- do { \
- if (bit) \
- *pFIO_FLAG_S = PF_SCL; \
- else \
- *pFIO_FLAG_C = PF_SCL; \
- SSYNC(); \
- } while (0)
-#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
-
+#define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF9
+#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF8
#define CONFIG_SYS_I2C_SPEED 50000
#define CONFIG_SYS_I2C_SLAVE 0xFE
#endif
* Serial Flash Infomation
*/
#define CONFIG_BFIN_SPI
-/* For the M25P64 SCK Should be Kept < 20Mhz */
-#define CONFIG_ENV_SPI_MAX_HZ 20000000
-#define CONFIG_SF_DEFAULT_SPEED 20000000
+/* For the M25P64 SCK Should be Kept < 15Mhz */
+#define CONFIG_ENV_SPI_MAX_HZ 15000000
+#define CONFIG_SF_DEFAULT_SPEED 15000000
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_STMICRO