#define FSL_QSPI_FLASH_NUM 2
#define CONFIG_SYS_FSL_QSPI_LE
#endif
-
-#define CONFIG_LOADADDR 0x82000000
+#define CONFIG_SYS_LOAD_ADDR 0x82000000
/* We boot from the gfxRAM area of the OCRAM. */
#define CONFIG_BOARD_SIZE_LIMIT 520192
"source to NAND\0" \
"active_workset=1\0"
-/* Miscellaneous configurable options */
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* Physical memory map */
#define PHYS_SDRAM (0x80000000)
#define PHYS_SDRAM_SIZE (SZ_512M)