#define CONFIG_SYS_MAX_FLASH_SECT 135
/* The BF561-EZKIT uses a top boot flash */
#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_ADDR 0x20004000
-#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
+#define CONFIG_ENV_OFFSET 0x4000
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_ENV_SECT_SIZE 0x10000
#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
* it linked after the configuration sector.
*/
# define LDS_BOARD_TEXT \
- arch/blackfin/cpu/traps.o (.text .text.*); \
- arch/blackfin/cpu/interrupt.o (.text .text.*); \
- arch/blackfin/cpu/serial.o (.text .text.*); \
- common/dlmalloc.o (.text .text.*); \
- lib/crc32.o (.text .text.*); \
- lib/zlib.o (.text .text.*); \
- board/bf561-ezkit/bf561-ezkit.o (.text .text.*); \
+ arch/blackfin/lib/libblackfin.o (.text*); \
+ arch/blackfin/cpu/libblackfin.o (.text*); \
. = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text .text.*);
+ common/env_embedded.o (.text*);
#endif
* I2C Settings
*/
#define CONFIG_SOFT_I2C
-#ifdef CONFIG_SOFT_I2C
-#define PF_SCL PF0
-#define PF_SDA PF1
-#define I2C_INIT \
- do { \
- *pFIO0_DIR |= PF_SCL; \
- SSYNC(); \
- } while (0)
-#define I2C_ACTIVE \
- do { \
- *pFIO0_DIR |= PF_SDA; \
- *pFIO0_INEN &= ~PF_SDA; \
- SSYNC(); \
- } while (0)
-#define I2C_TRISTATE \
- do { \
- *pFIO0_DIR &= ~PF_SDA; \
- *pFIO0_INEN |= PF_SDA; \
- SSYNC(); \
- } while (0)
-#define I2C_READ ((*pFIO0_FLAG_D & PF_SDA) != 0)
-#define I2C_SDA(bit) \
- do { \
- if (bit) \
- *pFIO0_FLAG_S = PF_SDA; \
- else \
- *pFIO0_FLAG_C = PF_SDA; \
- SSYNC(); \
- } while (0)
-#define I2C_SCL(bit) \
- do { \
- if (bit) \
- *pFIO0_FLAG_S = PF_SCL; \
- else \
- *pFIO0_FLAG_C = PF_SCL; \
- SSYNC(); \
- } while (0)
-#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
-
-#endif
+#define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
+#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
/*