#include <asm/config-pre.h>
-
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf561-0.5
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
-
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5
-
/*
* Memory Settings
*/
#define CONFIG_SYS_MONITOR_LEN (384 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
-
/*
* RTC Settings
*/
#define CONFIG_SYS_DTT_LOW_TEMP -30
#define CONFIG_SYS_DTT_HYSTERESIS 3*/
-
/*
* Network Settings
*/
#define ADI_CMDS_NETWORK 1
-#define CONFIG_CMD_MII
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DTT
#define CONFIG_HOSTNAME bf561-acvilon
-
/*
* Flash Settings
*/
#define CONFIG_SYS_NO_FLASH
-
/*
* I2C Settings
*/
#define CONFIG_PCA9564_I2C
#define CONFIG_PCA9564_BASE 0x2c000000
-
/*
* SPI Settings
*/
#define CONFIG_ENV_SPI_MAX_HZ 10000000
#define CONFIG_SF_DEFAULT_SPEED 10000000
-
/*
* Env Storage Settings
*/
#define CONFIG_ENV_OFFSET ((16 + 256) * 1056)
#define CONFIG_ENV_SIZE (8 * 1056)
-
/*
* NAND Settings
* We're using NAND_PLAT driver to make things simplier
#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
#define NAND_PLAT_GPIO_DEV_READY GPIO_PF10
-
/*
* Misc Settings
*/