#define CONFIG_SYS_CLKDIV_PBA 2
#define CONFIG_SYS_CLKDIV_PBB 1
+/* Reserve VM regions for SDRAM and NOR flash */
+#define CONFIG_SYS_NR_VM_REGIONS 2
+
/*
* The PLLOPT register controls the PLL like this:
* icp = PLLOPT<2>
#define CONFIG_CMD_SF
#define CONFIG_CMD_SPI
-#undef CONFIG_CMD_AUTOSCRIPT
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_SOURCE
#undef CONFIG_CMD_XIMG
#define CONFIG_ATMEL_USART 1
#define CONFIG_MACB 1
-#define CONFIG_PIO2 1
+#define CONFIG_PORTMUX_PIO 1
#define CONFIG_SYS_NR_PIOS 5
#define CONFIG_SYS_HSDRAMC 1
#define CONFIG_MMC 1