/*
- * (C) Copyright 2007
- * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
* Lead Tech Design <www.leadtechdesign.com>
*
* Configuation settings for the AT91CAP9ADK board.
#define __CONFIG_H
/* ARM asynchronous clock */
-#define AT91C_MAIN_CLOCK 200000000 /* from 12 MHz crystal */
-#define AT91C_MASTER_CLOCK 100000000 /* peripheral = main / 2 */
+#define AT91_CPU_NAME "AT91CAP9"
+#define AT91_MAIN_CLOCK 200000000 /* from 12 MHz crystal */
+#define AT91_MASTER_CLOCK 100000000 /* peripheral = main / 2 */
#define CFG_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
-#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
-/*
- * Size of malloc() pool
- */
-#define CFG_MALLOC_LEN ROUND(CFG_ENV_SIZE + 128*1024, 0x1000)
-#define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
-
-#define CONFIG_BAUDRATE 115200
-
/*
* Hardware drivers
*/
-
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1
#undef CONFIG_USART2
#define CONFIG_USART3 1 /* USART 3 is DBGU */
-#define CONFIG_BOOTDELAY 3
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock1 rw rootfstype=jffs2"
+/* LCD */
+#define CONFIG_LCD 1
+#define LCD_BPP LCD_COLOR8
+#define CONFIG_LCD_LOGO 1
+#undef LCD_TEST_PATTERN
+#define CONFIG_LCD_INFO 1
+#define CONFIG_LCD_INFO_BELOW_LOGO 1
+#define CFG_WHITE_ON_BLACK 1
+#define CONFIG_ATMEL_LCD 1
+#define CONFIG_ATMEL_LCD_BGR555 1
+#define CFG_CONSOLE_IS_IN_ENV 1
-/* #define CONFIG_ENV_OVERWRITE 1 */
+#define CONFIG_BOOTDELAY 3
/*
* BOOTP options
#define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
#define CFG_MAX_DATAFLASH_BANKS 1
#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
-#define CONFIG_NEW_PARTITION 1
+#define AT91_SPI_CLK 15000000
+#define DATAFLASH_TCSS (0x1a << 16)
+#define DATAFLASH_TCHS (0x1 << 24)
/* NOR flash */
#define CFG_FLASH_CFI 1
-#define CFG_FLASH_CFI_DRIVER 1
+#define CONFIG_FLASH_CFI_DRIVER 1
#define PHYS_FLASH_1 0x10000000
#define CFG_FLASH_BASE PHYS_FLASH_1
#define CFG_MAX_FLASH_SECT 256
#define CFG_MAX_FLASH_BANKS 1
-#define AT91C_FLASH_NWE_SETUP (4 << 0)
-#define AT91C_FLASH_NCS_WR_SETUP (2 << 8)
-#define AT91C_FLASH_NRD_SETUP (4 << 16)
-#define AT91C_FLASH_NCS_RD_SETUP (2 << 24)
-
-#define AT91C_FLASH_NWE_PULSE (8 << 0)
-#define AT91C_FLASH_NCS_WR_PULSE (10 << 8)
-#define AT91C_FLASH_NRD_PULSE (8 << 16)
-#define AT91C_FLASH_NCS_RD_PULSE (10 << 24)
-
-#define AT91C_FLASH_NWE_CYCLE (16 << 0)
-#define AT91C_FLASH_NRD_CYCLE (16 << 16)
-
/* NAND flash */
#define NAND_MAX_CHIPS 1
#define CFG_MAX_NAND_DEVICE 1
#define CFG_NAND_BASE 0x40000000
-
-#define AT91C_SM_NWE_SETUP (2 << 0)
-#define AT91C_SM_NCS_WR_SETUP (1 << 8)
-#define AT91C_SM_NRD_SETUP (2 << 16)
-#define AT91C_SM_NCS_RD_SETUP (1 << 24)
-
-#define AT91C_SM_NWE_PULSE (4 << 0)
-#define AT91C_SM_NCS_WR_PULSE (6 << 8)
-#define AT91C_SM_NRD_PULSE (4 << 16)
-#define AT91C_SM_NCS_RD_PULSE (6 << 24)
-
-#define AT91C_SM_NWE_CYCLE (8 << 0)
-#define AT91C_SM_NRD_CYCLE (8 << 16)
-
-#define AT91C_SM_TDF (1 << 16)
+#define CFG_NAND_DBW_8 1
/* Ethernet */
#define CONFIG_MACB 1
#define LITTLEENDIAN 1
#define CONFIG_DOS_PARTITION 1
#define CFG_USB_OHCI_CPU_INIT 1
-#define CFG_USB_OHCI_REGS_BASE 0x00700000 /* AT91C_BASE_UHP */
+#define CFG_USB_OHCI_REGS_BASE 0x00700000 /* AT91_BASE_UHP */
#define CFG_USB_OHCI_SLOT_NAME "at91cap9"
#define CFG_USB_OHCI_MAX_ROOT_PORTS 2
-
#define CFG_LOAD_ADDR 0x72000000 /* load address */
#define CFG_MEMTEST_START PHYS_SDRAM
-#define CFG_MEMTEST_END 0x73000000
+#define CFG_MEMTEST_END 0x73e00000
#define CFG_USE_DATAFLASH 1
#undef CFG_USE_NORFLASH
#define CFG_ENV_OFFSET 0x4200
#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
#define CFG_ENV_SIZE 0x4200
-#define CONFIG_BOOTCOMMAND "cp.b 0xC003DE00 0x72000000 0x200040; bootm"
+#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x72000000 0x210000; bootm"
+#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
+ "root=/dev/mtdblock1 " \
+ "mtdparts=physmap-flash.0:-(nor);" \
+ "at91_nand:-(root) " \
+ "rw rootfstype=jffs2"
#else
#define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_ENV_OFFSET)
#define CFG_ENV_SIZE 0x4000
#define CONFIG_BOOTCOMMAND "cp.b 0x10040000 0x72000000 0x200000; bootm"
+#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
+ "root=/dev/mtdblock4 " \
+ "mtdparts=physmap-flash.0:16k(bootstrap)ro,"\
+ "16k(env),224k(uboot)ro,-(linux);" \
+ "at91_nand:-(root) " \
+ "rw rootfstype=jffs2"
#endif
+#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
#define CFG_PROMPT "U-Boot> "
#define CFG_LONGHELP 1
#define CONFIG_CMDLINE_EDITING 1
+#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN ROUND(CFG_ENV_SIZE + 128*1024, 0x1000)
+#define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
+
#define CONFIG_STACKSIZE (32*1024) /* regular stack */
#ifdef CONFIG_USE_IRQ
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