#ifndef __CONFIG_H
#define __CONFIG_H
-/* ARM asynchronous clock */
-#define AT91_CPU_NAME "AT91CAP9"
-#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
-#define AT91_MASTER_CLOCK 100000000 /* peripheral */
-#define AT91_CPU_CLOCK 200000000 /* cpu */
-#define CFG_AT91_PLLB 0x10073e01 /* PLLB settings for USB */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define CONFIG_AT91_LEGACY
-#define AT91_SLOW_CLOCK 32768 /* slow clock */
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
+#define CONFIG_SYS_HZ 1000
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
#define CONFIG_AT91CAP9 1 /* It's an Atmel AT91CAP9 SoC */
#define CONFIG_AT91CAP9ADK 1 /* on an AT91CAP9ADK Board */
+#define CONFIG_ARCH_CPU_INIT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_INITRD_TAG 1
#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SKIP_RELOCATE_UBOOT
/*
* Hardware drivers
*/
+#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1
#define CONFIG_ATMEL_LCD_BGR555 1
#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
+/* LED */
+#define CONFIG_AT91_LED
+#define CONFIG_RED_LED AT91_PIN_PC29 /* this is the power led */
+#define CONFIG_GREEN_LED AT91_PIN_PA10 /* this is the user1 led */
+#define CONFIG_YELLOW_LED AT91_PIN_PA11 /* this is the user1 led */
+
#define CONFIG_BOOTDELAY 3
/*
*/
#include <config_cmd_default.h>
#undef CONFIG_CMD_BDI
-#undef CONFIG_CMD_IMI
-#undef CONFIG_CMD_AUTOSCRIPT
#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_SOURCE
#define CONFIG_CMD_PING 1
#define CONFIG_CMD_DHCP 1
#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
/* DataFlash */
+#define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH 1
#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
#define CONFIG_SYS_MAX_FLASH_SECT 256
#define CONFIG_SYS_MAX_FLASH_BANKS 1
+/* our ALE is AD21 */
+#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
+/* our CLE is AD22 */
+#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15
/* NAND flash */
-#define NAND_MAX_CHIPS 1
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_DBW_8 1
+#endif
+
/* Ethernet */
#define CONFIG_MACB 1
#define CONFIG_RMII 1
#define CONFIG_RESET_PHY_R 1
/* USB */
+#define CONFIG_USB_ATMEL
#define CONFIG_USB_OHCI_NEW 1
-#define LITTLEENDIAN 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91_BASE_UHP */
#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
"root=/dev/mtdblock1 " \
"mtdparts=physmap-flash.0:-(nor);" \
- "at91_nand:-(root) " \
+ "atmel_nand:-(root) " \
"rw rootfstype=jffs2"
#else
"root=/dev/mtdblock4 " \
"mtdparts=physmap-flash.0:16k(bootstrap)ro,"\
"16k(env),224k(uboot)ro,-(linux);" \
- "at91_nand:-(root) " \
+ "atmel_nand:-(root) " \
"rw rootfstype=jffs2"
#endif
#define CONFIG_SYS_LONGHELP 1
#define CONFIG_CMDLINE_EDITING 1
-#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
/*
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN ROUND(CONFIG_ENV_SIZE + 128*1024, 0x1000)
-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
#define CONFIG_STACKSIZE (32*1024) /* regular stack */