#define __CONFIG_H
/* ARM asynchronous clock */
-#define AT91_CPU_NAME "AT91CAP9"
#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
-#define AT91_MASTER_CLOCK 100000000 /* peripheral */
-#define AT91_CPU_CLOCK 200000000 /* cpu */
-#define CONFIG_SYS_AT91_PLLB 0x10073e01 /* PLLB settings for USB */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
-
-#define AT91_SLOW_CLOCK 32768 /* slow clock */
+#define CONFIG_SYS_HZ 1000
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
#define CONFIG_AT91CAP9 1 /* It's an Atmel AT91CAP9 SoC */
#define CONFIG_AT91CAP9ADK 1 /* on an AT91CAP9ADK Board */
+#define CONFIG_ARCH_CPU_INIT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15
-#endif
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_DBW_8 1
+#endif
+
/* Ethernet */
#define CONFIG_MACB 1
#define CONFIG_RMII 1
#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
"root=/dev/mtdblock1 " \
"mtdparts=physmap-flash.0:-(nor);" \
- "at91_nand:-(root) " \
+ "atmel_nand:-(root) " \
"rw rootfstype=jffs2"
#else
"root=/dev/mtdblock4 " \
"mtdparts=physmap-flash.0:16k(bootstrap)ro,"\
"16k(env),224k(uboot)ro,-(linux);" \
- "at91_nand:-(root) " \
+ "atmel_nand:-(root) " \
"rw rootfstype=jffs2"
#endif
#define CONFIG_SYS_LONGHELP 1
#define CONFIG_CMDLINE_EDITING 1
-#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
/*
* Size of malloc() pool
*/