+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2012-2020 ASPEED Technology Inc.
* Ryan Chen <ryan_chen@aspeedtech.com>
*
* Copyright 2016 IBM Corporation
* (C) Copyright 2016 Google, Inc
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __AST_COMMON_CONFIG_H
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
-/* Enable cache controller */
-#define CONFIG_SYS_DCACHE_OFF
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#ifdef CONFIG_PRE_CON_BUF_SZ
#define CONFIG_SYS_INIT_SP_ADDR (SYS_INIT_RAM_END \
- GENERATED_GBL_DATA_SIZE)
-#define CONFIG_NR_DRAM_BANKS 1
-
#define CONFIG_SYS_MALLOC_LEN (32 << 20)
/*