Merge tag 'u-boot-rockchip-20211015' of https://source.denx.de/u-boot/custodians...

[platform/kernel/u-boot.git] / include / configs / aspeed-common.h

diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h
index 1295a6c..5177bf2 100644 (file)
--- a/include/configs/aspeed-common.h
+++ b/include/configs/aspeed-common.h
@@ -7,22 +7,21 @@
  * (C) Copyright 2016 Google, Inc
  */
 
-#ifndef __AST_COMMON_CONFIG_H
-#define __AST_COMMON_CONFIG_H
+#ifndef _ASPEED_COMMON_CONFIG_H
+#define _ASPEED_COMMON_CONFIG_H
+
+#include <asm/arch/platform.h>
 
 /* Misc CPU related */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
 
-#define CONFIG_SYS_SDRAM_BASE          0x80000000
+#define CONFIG_SYS_SDRAM_BASE          ASPEED_DRAM_BASE
 
 #ifdef CONFIG_PRE_CON_BUF_SZ
-#define CONFIG_SYS_INIT_RAM_ADDR       (0x1e720000 + CONFIG_PRE_CON_BUF_SZ)
-#define CONFIG_SYS_INIT_RAM_SIZE       (36*1024 - CONFIG_PRE_CON_BUF_SZ)
+#define CONFIG_SYS_INIT_RAM_ADDR       (ASPEED_SRAM_BASE + CONFIG_PRE_CON_BUF_SZ)
+#define CONFIG_SYS_INIT_RAM_SIZE       (ASPEED_SRAM_SIZE - CONFIG_PRE_CON_BUF_SZ)
 #else
-#define CONFIG_SYS_INIT_RAM_ADDR       (0x1e720000)
-#define CONFIG_SYS_INIT_RAM_SIZE       (36*1024)
+#define CONFIG_SYS_INIT_RAM_ADDR       (ASPEED_SRAM_BASE)
+#define CONFIG_SYS_INIT_RAM_SIZE       (ASPEED_SRAM_SIZE)
 #endif
 
 #define SYS_INIT_RAM_END               (CONFIG_SYS_INIT_RAM_ADDR \
@@ -30,8 +29,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR                (SYS_INIT_RAM_END \
                                         - GENERATED_GBL_DATA_SIZE)
 
-#define CONFIG_SYS_MALLOC_LEN          (32 << 20)
-
 /*
  * NS16550 Configuration
  */
@@ -45,8 +42,6 @@
  * Miscellaneous configurable options
  */
 
-#define CONFIG_BOOTCOMMAND             "bootm 20080000 20300000"
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "verify=yes\0"  \
        "spi_dma=yes\0" \