Merge tag 'arc-fixes-for-2019.04-rc1' of git://git.denx.de/u-boot-arc

[platform/kernel/u-boot.git] / include / configs / apf27.h

diff --git a/include/configs/apf27.h b/include/configs/apf27.h
index d95da27..1cee2fa 100644 (file)
--- a/include/configs/apf27.h
+++ b/include/configs/apf27.h
@@ -1,10 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  *
  * Configuration settings for the Armadeus Project motherboard APF27
  *
  * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -39,22 +38,16 @@
 /*
  * BOOTP options
  */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
 #define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_DNS
 #define CONFIG_BOOTP_DNS2
 
-#define CONFIG_HOSTNAME        CONFIG_BOARD_NAME
+#define CONFIG_HOSTNAME        "apf27"
 #define CONFIG_ROOTPATH        "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
 
 /*
  * Memory configurations
  */
 #define CONFIG_NR_DRAM_POPULATED 1
-#define CONFIG_NR_DRAM_BANKS   2
 
 #define ACFG_SDRAM_MBYTE_SYZE 64
 
@@ -88,13 +81,9 @@
 /*
  * U-Boot general configurations
  */
-#define CONFIG_SYS_LONGHELP
 #define CONFIG_SYS_CBSIZE              2048            /* console I/O buffer */
 #define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
                                                /* Boot argument buffer size */
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
 #define CONFIG_PREBOOT                 "run check_flash check_env;"
 
 /*
@@ -164,7 +153,6 @@
  * Serial Driver
  */
 #define CONFIG_MXC_UART
-#define CONFIG_CONS_INDEX              1
 #define CONFIG_MXC_UART_BASE           UART1_BASE
 
 /*
@@ -195,21 +183,17 @@
 /*
  * Partitions & Filsystems
  */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 
 /*
  * Ethernet (on SOC imx FEC)
  */
 #define CONFIG_FEC_MXC
 #define CONFIG_FEC_MXC_PHYADDR         0x1f
-#define CONFIG_MII                             /* MII PHY management   */
 
 /*
  * FPGA
  */
 #define CONFIG_FPGA_COUNT              1
-#define CONFIG_FPGA_SPARTAN3
 #define CONFIG_SYS_FPGA_WAIT           250 /* 250 ms */
 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
 #define CONFIG_SYS_FPGA_CHECK_CTRLC