Convert CONFIG_SPL_STACK to Kconfig

[platform/kernel/u-boot.git] / include / configs / am64x_evm.h

diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h
index d84a8db..d7ec317 100644 (file)
--- a/include/configs/am64x_evm.h
+++ b/include/configs/am64x_evm.h
@@ -18,22 +18,9 @@
 /* DDR Configuration */
 #define CONFIG_SYS_SDRAM_BASE1         0x880000000
 
-#ifdef CONFIG_SYS_K3_SPL_ATF
-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME        "tispl.bin"
-#endif
-
-#define CONFIG_SPL_MAX_SIZE            CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
 #if defined(CONFIG_TARGET_AM642_A53_EVM)
-#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SPL_TEXT_BASE + SZ_4M)
 #else
 /*
- * Maximum size in memory allocated to the SPL BSS. Keep it as tight as
- * possible (to allow the build to go through), as this directly affects
- * our memory footprint. The less we use for BSS the more we have available
- * for everything else.
- */
-#define CONFIG_SPL_BSS_MAX_SIZE                0x4000
-/*
  * Link BSS to be within SPL in a dedicated region located near the top of
  * the MCU SRAM, this way making it available also before relocation. Note
  * that we are not using the actual top of the MCU SRAM as there is a memory
@@ -43,7 +30,6 @@
 #define CONFIG_SPL_BSS_START_ADDR      (TI_SRAM_SCRATCH_BOARD_EEPROM_START -\
                                         CONFIG_SPL_BSS_MAX_SIZE)
 /* Set the stack right below the SPL BSS section */
-#define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SPL_BSS_START_ADDR
 /* Configure R5 SPL post-relocation malloc pool in DDR */
 #define CONFIG_SYS_SPL_MALLOC_START    0x84000000
 #define CONFIG_SYS_SPL_MALLOC_SIZE     SZ_16M