#include <environment/ti/k3_dfu.h>
/* DDR Configuration */
-#define CONFIG_SYS_SDRAM_BASE1 0x880000000
-
-#if defined(CONFIG_TARGET_AM642_A53_EVM)
-#else
-/*
- * Link BSS to be within SPL in a dedicated region located near the top of
- * the MCU SRAM, this way making it available also before relocation. Note
- * that we are not using the actual top of the MCU SRAM as there is a memory
- * location filled in by the boot ROM that we want to read out without any
- * interference from the C context.
- */
-#define CONFIG_SPL_BSS_START_ADDR (TI_SRAM_SCRATCH_BOARD_EEPROM_START -\
- CONFIG_SPL_BSS_MAX_SIZE)
-/* Set the stack right below the SPL BSS section */
-/* Configure R5 SPL post-relocation malloc pool in DDR */
-#define CONFIG_SYS_SPL_MALLOC_START 0x84000000
-#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M
-#endif
+#define CFG_SYS_SDRAM_BASE1 0x880000000
#define PARTS_DEFAULT \
/* Linux partitions */ \
/* Now for the remaining common defines */
#include <configs/ti_armv7_common.h>
-#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
-
#endif /* __CONFIG_AM642_EVM_H */