#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
-#ifndef CONFIG_SPL_BUILD
-
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x80000000\0" \
"pxefile_addr_r=0x80100000\0" \
MEM_LAYOUT_ENV_SETTINGS \
BOOTENV
-#endif
-
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */