#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
-#define CONFIG_HSMMC2_8BIT
-
#ifndef CONFIG_SPL_BUILD
-#define CONFIG_EXTRA_ENV_SETTINGS \
+#define CFG_EXTRA_ENV_SETTINGS \
"loadaddr=0x80200000\0" \
"kloadaddr=0x84000000\0" \
"fdtaddr=0x85000000\0" \