global: Migrate CONFIG_MXC_UART_BASE to CFG
[platform/kernel/u-boot.git] / include / configs / am335x_guardian.h
index c34c07a..a8fa61c 100644 (file)
 
 #include <configs/ti_am335x_common.h>
 
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_TIMESTAMP
-#endif
-
-#define CONFIG_SYS_BOOTM_LEN           (16 << 20)
-
 /* Clock Defines */
 #define V_OSCK                         24000000  /* Clock output from T2 */
 #define V_SCLK                         (V_OSCK)
 
-#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-
 #ifndef CONFIG_SPL_BUILD
 
 #define MEM_LAYOUT_ENV_SETTINGS \
        "scriptaddr=0x80000000\0" \
        "pxefile_addr_r=0x80100000\0" \
+       "tftp_load_addr=0x82000000\0" \
        "kernel_addr_r=0x82000000\0" \
        "fdt_addr_r=0x88000000\0" \
        "ramdisk_addr_r=0x88080000\0" \
 
 #define BOOT_TARGET_DEVICES(func) \
-       func(UBIFS, ubifs, 0)
+       func(UBIFS, ubifs, 0, UBI, rootfs)
 
 #define AM335XX_BOARD_FDTFILE "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0"
 
        "main_pcba_aux_3=0\0" \
        "main_pcba_aux_4=0\0" \
 
-#define CONFIG_EXTRA_ENV_SETTINGS \
+#define CFG_EXTRA_ENV_SETTINGS \
        AM335XX_BOARD_FDTFILE \
        MEM_LAYOUT_ENV_SETTINGS \
        BOOTENV \
        GUARDIAN_DEFAULT_PROD_ENV \
-       "bootubivol=rootfs\0" \
+       "backlight_brightness=50\0" \
        "distro_bootcmd=" \
-               "setenv autoload no; " \
                "setenv rootflags \"bulk_read,chk_data_crc\"; " \
                "setenv ethact usb_ether; " \
                "if test \"${swi_status}\" -eq 1; then " \
-                 "setenv extrabootargs \"swi_attached\"; " \
                  "if dhcp; then " \
                    "sleep 1; " \
                    "if tftp \"${tftp_load_addr}\" \"bootscript.scr\"; then " \
                      "source \"${tftp_load_addr}\"; " \
                    "fi; " \
                  "fi; " \
+                 "setenv extrabootargs $extrabootargs \"swi_attached\"; " \
                "fi;" \
                "run bootcmd_ubifs0;\0" \
        "altbootcmd=" \
 
 #endif /* ! CONFIG_SPL_BUILD */
 
-/* NS16550 Configuration */
-#define CONFIG_SYS_NS16550_COM1                0x44e09000      /* UART0 */
-#define CONFIG_SYS_NS16550_COM2                0x48022000      /* UART1 */
-#define CONFIG_SYS_NS16550_COM3                0x48024000      /* UART2 */
-#define CONFIG_SYS_NS16550_COM4                0x481a6000      /* UART3 */
-#define CONFIG_SYS_NS16550_COM5                0x481a8000      /* UART4 */
-#define CONFIG_SYS_NS16550_COM6                0x481aa000      /* UART5 */
+#define SPLASH_SCREEN_NAND_PART "nand0,10"
+#define SPLASH_SCREEN_BMP_FILE_SIZE 0x26000
+#define SPLASH_SCREEN_BMP_LOAD_ADDR 0x82000000
+#define SPLASH_SCREEN_TEXT "U-Boot"
 
-/* PMIC support */
-#define CONFIG_POWER_TPS65217
+/* BGR 16Bit Color Definitions */
+#define CONSOLE_COLOR_BLACK 0x0000
+#define CONSOLE_COLOR_WHITE 0xFFFF
+#define CONSOLE_COLOR_RED 0x001F
 
-/* Bootcount using the RTC block */
-#define CONFIG_SYS_BOOTCOUNT_LE
+/* NS16550 Configuration */
+#define CFG_SYS_NS16550_COM1           0x44e09000      /* UART0 */
+#define CFG_SYS_NS16550_COM2           0x48022000      /* UART1 */
+#define CFG_SYS_NS16550_COM3           0x48024000      /* UART2 */
+#define CFG_SYS_NS16550_COM4           0x481a6000      /* UART3 */
+#define CFG_SYS_NS16550_COM5           0x481a8000      /* UART4 */
+#define CFG_SYS_NS16550_COM6           0x481aa000      /* UART5 */
 
 #ifdef CONFIG_MTD_RAW_NAND
-
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
-                                       CONFIG_SYS_NAND_PAGE_SIZE)
-#define CONFIG_SYS_NAND_PAGE_SIZE       4096
-#define CONFIG_SYS_NAND_OOBSIZE         256
-#define CONFIG_SYS_NAND_BLOCK_SIZE      (256 * 1024)
-
-#define CONFIG_SYS_NAND_ECCPOS  {   2,   3,   4,   5,   6,   7,   8,   9, \
+#define CFG_SYS_NAND_ECCPOS  {   2,   3,   4,   5,   6,   7,   8,   9, \
                         10,  11,  12,  13,  14,  15,  16,  17,  18,  19, \
                         20,  21,  22,  23,  24,  25,  26,  27,  28,  29, \
                         30,  31,  32,  33,  34,  35,  36,  37,  38,  39, \
                        190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \
                        200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \
                        }
-#define CONFIG_SYS_NAND_ECCSIZE         512
-#define CONFIG_SYS_NAND_ECCBYTES        26
-#define CONFIG_SYS_NAND_ONFI_DETECTION
-#define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH16_CODE_HW
-#define MTDIDS_DEFAULT                  "nand0=nand.0"
-
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
+#define CFG_SYS_NAND_ECCSIZE         512
+#define CFG_SYS_NAND_ECCBYTES        26
 
 #endif /* CONFIG_MTD_RAW_NAND */
 
-#define CONFIG_AM335X_USB0
-#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL
-#define CONFIG_AM335X_USB1
-#define CONFIG_AM335X_USB1_MODE MUSB_HOST
-
 #endif /* ! __CONFIG_AM335X_GUARDIAN_H */