#ifndef __CONFIG_H
#define __CONFIG_H
-/* ARM asynchronous clock */
-#define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */
-#define AT91_MASTER_CLOCK 89999598 /* peripheral = main / 2 */
-#define CONFIG_SYS_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define CONFIG_AT91_LEGACY
-#define AT91_SLOW_CLOCK 32768 /* slow clock */
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */
+#define CONFIG_SYS_HZ 1000
#define CONFIG_AT91SAM9260 1 /* It's an Atmel AT91SAM9260 SoC*/
#define CONFIG_AFEB9260 1 /* on an AFEB9260 Board */
+#define CONFIG_ARCH_CPU_INIT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
/*
* Hardware drivers
*/
+#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1
#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
/* DataFlash */
+#define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH 1
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
+
#endif
/* NOR flash - no real flash on this board */
#define CONFIG_NET_RETRY_COUNT 20
/* USB */
+#define CONFIG_USB_ATMEL
#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
#define CONFIG_SYS_LONGHELP 1
#define CONFIG_CMDLINE_EDITING 1
-#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
/*
* Size of malloc() pool
*/