Merge branch 'next' of git://git.denx.de/u-boot-avr32

[platform/kernel/u-boot.git] / include / configs / ads5121.h

diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h
index c975a24..d129ea3 100644 (file)
--- a/include/configs/ads5121.h
+++ b/include/configs/ads5121.h
@@ -27,6 +27,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_ADS5121 1
 /*
  * Memory map for the ADS5121 board:
  *
@@ -57,7 +58,12 @@
 
 /* CONFIG_PCI is defined at config time */
 
+#ifdef CONFIG_ADS5121_REV2
 #define CFG_MPC512X_CLKIN      66000000        /* in Hz */
+#else
+#define CFG_MPC512X_CLKIN      33333333        /* in Hz */
+#define CONFIG_PCI
+#endif
 
 #define CONFIG_BOARD_EARLY_INIT_F              /* call board_early_init_f() */
 #define CONFIG_MISC_INIT_R
@@ -71,7 +77,11 @@
 /*
  * DDR Setup - manually set all parameters as there's no SPD etc.
  */
+#ifdef CONFIG_ADS5121_REV2
 #define CFG_DDR_SIZE           256             /* MB */
+#else
+#define CFG_DDR_SIZE           512             /* MB */
+#endif
 #define CFG_DDR_BASE           0x00000000      /* DDR is system memory*/
 #define CFG_SDRAM_BASE         CFG_DDR_BASE
 
@@ -119,14 +129,20 @@
  *     [09:05] DRAM tRP:
  *     [04:00] DRAM tRPA
  */
-
+#ifdef CONFIG_ADS5121_REV2
 #define CFG_MDDRC_SYS_CFG      0xF8604A00
 #define CFG_MDDRC_SYS_CFG_RUN  0xE8604A00
+#define CFG_MDDRC_TIME_CFG1    0x54EC1168
+#define CFG_MDDRC_TIME_CFG2    0x35210864
+#else
+#define CFG_MDDRC_SYS_CFG       0xFA804A00
+#define CFG_MDDRC_SYS_CFG_RUN   0xEA804A00
+#define CFG_MDDRC_TIME_CFG1     0x68EC1168
+#define CFG_MDDRC_TIME_CFG2     0x34310864
+#endif
 #define CFG_MDDRC_SYS_CFG_EN   0xF0000000
 #define CFG_MDDRC_TIME_CFG0    0x00003D2E
 #define CFG_MDDRC_TIME_CFG0_RUN        0x06183D2E
-#define CFG_MDDRC_TIME_CFG1    0x54EC1168
-#define CFG_MDDRC_TIME_CFG2    0x35210864
 
 #define CFG_MICRON_NOP         0x01380000
 #define CFG_MICRON_PCHG_ALL    0x01100400
@@ -165,12 +181,17 @@
 /*
  * NOR FLASH on the Local Bus
  */
+#undef CONFIG_BKUP_FLASH
 #define CFG_FLASH_CFI                          /* use the Common Flash Interface */
-#define CFG_FLASH_CFI_DRIVER                   /* use the CFI driver */
+#define CONFIG_FLASH_CFI_DRIVER                        /* use the CFI driver */
+#ifdef CONFIG_BKUP_FLASH
+#define CFG_FLASH_BASE         0xFF800000      /* start of FLASH   */
+#define CFG_FLASH_SIZE         0x00800000      /* max flash size in bytes */
+#else
 #define CFG_FLASH_BASE         0xFC000000      /* start of FLASH   */
 #define CFG_FLASH_SIZE         0x04000000      /* max flash size in bytes */
+#endif
 #define CFG_FLASH_USE_BUFFER_WRITE
-
 #define CFG_MAX_FLASH_BANKS    1               /* number of banks */
 #define CFG_FLASH_BANKS_LIST   {CFG_FLASH_BASE}
 #define CFG_MAX_FLASH_SECT     256             /* max sectors per device */
@@ -286,14 +307,14 @@
 #define CONFIG_NET_MULTI
 #define CONFIG_PHY_ADDR                0x1
 #define CONFIG_MII             1       /* MII PHY management           */
+#define CONFIG_FEC_AN_TIMEOUT  1
+#define CONFIG_HAS_ETH0
 
-#if 0
 /*
  * Configure on-board RTC
  */
-#define CONFIG_RTC_DS1374                      /* use ds1374 rtc via i2c       */
+#define CONFIG_RTC_M41T62                      /* use M41T62 rtc via i2 */
 #define CFG_I2C_RTC_ADDR               0x68    /* at address 0x68              */
-#endif
 
 /*
  * Environment
@@ -302,7 +323,11 @@
 /* This has to be a multiple of the Flash sector size */
 #define CFG_ENV_ADDR           (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
 #define CFG_ENV_SIZE           0x2000
+#ifdef CONFIG_BKUP_FLASH
+#define CFG_ENV_SECT_SIZE      0x20000 /* one sector (256K) for env */
+#else
 #define CFG_ENV_SECT_SIZE      0x40000 /* one sector (256K) for env */
+#endif
 
 /* Address and size of Redundant Environment Sector    */
 #define CFG_ENV_ADDR_REDUND    (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
@@ -321,6 +346,7 @@
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_REGINFO
 #define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_DATE
 
 #if defined(CONFIG_PCI)
 #define CONFIG_CMD_PCI
@@ -372,6 +398,8 @@
 #define CFG_HID0_FINAL HID0_ENABLE_MACHINE_CHECK
 #define CFG_HID2       HID2_HBE
 
+#define CONFIG_HIGH_BATS       1       /* High BATs supported */
+
 /*
  * Internal Definitions
  *
@@ -451,10 +479,10 @@
 
 #define CONFIG_OF_LIBFDT       1
 #define CONFIG_OF_BOARD_SETUP  1
+#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES     1
 
 #define OF_CPU                 "PowerPC,5121@0"
-#define OF_SOC                 "soc@80000000"
-#define OF_SOC_OLD             "soc5121@80000000"
+#define OF_SOC_COMPAT          "fsl,mpc5121-immr"
 #define OF_TBCLK               (bd->bi_busfreq / 4)
 #define OF_STDOUT_PATH         "/soc@80000000/serial@11300"