#define PHYS_SDRAM_1 \
(PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */
-#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 bank of DRAM */
-
#ifdef CONFIG_SKIP_LOWLEVEL_INIT
#define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */
#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */
* FLASH and environment organization
*/
/* use CFI framework */
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#define CONFIG_SYS_CFI_FLASH_STATUS_POLL
/* support JEDEC */
/* max number of sectors on one chip */
#define CONFIG_FLASH_SECTOR_SIZE (0x10000*2)
-#define CONFIG_ENV_SECT_SIZE CONFIG_FLASH_SECTOR_SIZE
#define CONFIG_SYS_MAX_FLASH_SECT 512
/* environments */
-#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x140000)
-#define CONFIG_ENV_SIZE 8192
#define CONFIG_ENV_OVERWRITE
/*