*
* Configuation settings for the Faraday A320 board.
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#include <asm/arch/a320.h>
-/*-----------------------------------------------------------------------
- * CPU and Board Configuration Options
+/*
+ * mach-type definition
*/
-#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+#define MACH_TYPE_FARADAY 758
+#define CONFIG_MACH_TYPE MACH_TYPE_FARADAY
+/*
+ * Linux kernel tagged list
+ */
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+
+/*
+ * CPU and Board Configuration Options
+ */
#undef CONFIG_SKIP_LOWLEVEL_INIT
-/*-----------------------------------------------------------------------
+/*
+ * Power Management Unit
+ */
+#define CONFIG_FTPMU010_POWER
+
+/*
* Timer
*/
-#define CONFIG_SYS_HZ 1000 /* timer ticks per second */
-/*-----------------------------------------------------------------------
+/*
* Real Time Clock
*/
#define CONFIG_RTC_FTRTC010
-/*-----------------------------------------------------------------------
+/*
* Serial console configuration
*/
#define CONFIG_SYS_NS16550_REG_SIZE -4
#define CONFIG_SYS_NS16550_CLK 18432000
-/* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
-/*-----------------------------------------------------------------------
+/*
* Ethernet
*/
-#define CONFIG_NET_MULTI
#define CONFIG_FTMAC100
#define CONFIG_BOOTDELAY 3
-/*-----------------------------------------------------------------------
+/*
* Command line configuration.
*/
#include <config_cmd_default.h>
#define CONFIG_CMD_DATE
#define CONFIG_CMD_PING
-/*-----------------------------------------------------------------------
+/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-/*-----------------------------------------------------------------------
- * Stack sizes
- *
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */
-#endif
-
-/*-----------------------------------------------------------------------
+/*
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
-/*-----------------------------------------------------------------------
- * size in bytes reserved for initial data
-*/
-#define CONFIG_SYS_GBL_DATA_SIZE 128
-
-/*-----------------------------------------------------------------------
+/*
* SDRAM controller configuration
*/
#define CONFIG_SYS_FTSDMC020_TP0 (FTSDMC020_TP0_TRAS(2) | \
FTSDMC020_BANK_MBW_32 | \
FTSDMC020_BANK_SIZE_64M)
-/*-----------------------------------------------------------------------
+/*
* Physical Memory Map
*/
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
+ GENERATED_GBL_DATA_SIZE)
+
/*
* Load address and memory test area should agree with
* board/faraday/a320/config.mk. Be careful not to overwrite U-boot itself.
*/
-#define CONFIG_SYS_LOAD_ADDR 0x12000000
+#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x2000000)
/* memtest works on 63 MB in DRAM */
-#define CONFIG_SYS_MEMTEST_START 0x10000000
-#define CONFIG_SYS_MEMTEST_END 0x13F00000
+#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
+#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x3F00000)
-/*-----------------------------------------------------------------------
+#define CONFIG_SYS_TEXT_BASE 0
+
+/*
* Static memory controller configuration
*/
-#include <asm/arch/ftsmc020.h>
+#define CONFIG_FTSMC020
+#include <faraday/ftsmc020.h>
#define FTSMC020_BANK0_CONFIG (FTSMC020_BANK_ENABLE | \
FTSMC020_BANK_BASE(PHYS_FLASH_1) | \
{ FTSMC020_BANK1_CONFIG, FTSMC020_BANK1_TIMING, }, \
}
-/*-----------------------------------------------------------------------
+/*
* FLASH and environment organization
*/
/* environments */
#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_ADDR 0x00060000
+#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x60000)
#define CONFIG_ENV_SIZE 0x20000
#endif /* __CONFIG_H */