ppc4xx: Remove cache definition from 4xx board config files
[platform/kernel/u-boot.git] / include / configs / W7OLMG.h
index a5ce685..bfb3156 100644 (file)
 
 
 /*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
  * Command line configuration.
  */
 #include <config_cmd_default.h>
  */
 #define SPD_EEPROM_ADDRESS      0x50   /* XXX conflicting address!!! XXX */
 
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE                8192            /* For AMCC 405 CPUs                    */
-#define CFG_CACHELINE_SIZE     32              /* ...          */
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5               /* log base 2 of the above val. */
-#endif
-
 /*
  * Init Memory Controller:
  */