Merge branch 'master' of git://git.denx.de/u-boot-marvell

[platform/kernel/u-boot.git] / include / configs / VOH405.h

diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h
index b9ea610..f0c0bd9 100644 (file)
--- a/include/configs/VOH405.h
+++ b/include/configs/VOH405.h
@@ -37,6 +37,8 @@
 #define CONFIG_4xx             1       /* ...member of PPC4xx family   */
 #define CONFIG_VOH405          1       /* ...on a VOH405 board         */
 
+#define        CONFIG_SYS_TEXT_BASE    0xFFF80000
+
 #define CONFIG_BOARD_EARLY_INIT_F 1    /* call board_early_init_f()    */
 #define CONFIG_MISC_INIT_R     1       /* call misc_init_r()           */
 
@@ -257,7 +259,7 @@
  */
 #define CONFIG_SYS_SDRAM_BASE          0x00000000
 #define CONFIG_SYS_FLASH_BASE          0xFFF80000
-#define CONFIG_SYS_MONITOR_BASE        TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_MONITOR_LEN         (512 * 1024)    /* Reserve 512 kB for Monitor   */
 #define CONFIG_SYS_MALLOC_LEN          (2 * 1024*1024) /* Reserve 2 MB for malloc()    */
 
@@ -375,10 +377,9 @@
 #define CONFIG_SYS_OCM_DATA_ADDR       0xF8000000
 #define CONFIG_SYS_OCM_DATA_SIZE       0x1000
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_OCM_DATA_ADDR /* inside of SDRAM             */
-#define CONFIG_SYS_INIT_RAM_END        CONFIG_SYS_OCM_DATA_SIZE /* End of used area in RAM     */
+#define CONFIG_SYS_INIT_RAM_SIZE       CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM    */
 
-#define CONFIG_SYS_GBL_DATA_SIZE      128  /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 /*-----------------------------------------------------------------------
@@ -409,14 +410,6 @@
 #define CONFIG_SYS_EEPROM_WP           (0x80000000 >> 0)
 
 /*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD  0x01            /* Normal Power-On: Boot from FLASH     */
-#define BOOTFLAG_WARM  0x02            /* Software reboot                      */
-
-/*
  * Default speed selection (cpu_plb_opb_ebc) in mhz.
  * This value will be set if iic boot eprom is disabled.
  */