#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
-#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
#if defined(CONFIG_TARTGET_UCP1020T1)
#define CONFIG_SYS_I2C_NCT72_ADDR 0x4C
#define CONFIG_SYS_I2C_IDT6V49205B 0x69
-#define CONFIG_SF_DEFAULT_SPEED 10000000
-#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
-
#if defined(CONFIG_PCI)
/*
* General PCI
#else
-#define CONFIG_ENV_SPI_BUS 0
-#define CONFIG_ENV_SPI_CS 0
-#define CONFIG_ENV_SPI_MAX_HZ 10000000
-#define CONFIG_ENV_SPI_MODE 0
#ifdef CONFIG_RAMBOOT_SPIFLASH