Merge git://git.denx.de/u-boot-dm

[platform/kernel/u-boot.git] / include / configs / UCP1020.h

diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h
index 3d220c2..9a7aa81 100644 (file)
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -14,7 +14,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_FSL_ELBC
 #define CONFIG_PCIE1   /* PCIE controller 1 (slot 1) */
 #define CONFIG_PCIE2   /* PCIE controller 2 (slot 2) */
 #define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
@@ -119,7 +118,6 @@
 
 #define CONFIG_ENV_OVERWRITE
 
-#define CONFIG_CMD_SATA
 #define CONFIG_SATA_SIL
 #define CONFIG_SYS_SATA_MAX_DEVICE     2
 #define CONFIG_LIBATA
@@ -130,35 +128,12 @@
 
 #define CONFIG_HWCONFIG
 
-#define CONFIG_DTT_ADM1021     1       /* ADM1021 temp sensor support  */
-#define CONFIG_SYS_DTT_BUS_NUM 1       /* The I2C bus for DTT          */
-#define CONFIG_DTT_SENSORS     { 0, 1 }        /* Sensor index */
-/*
- * ADM1021/NCT72 temp sensor configuration (see dtt/adm1021.c for details).
- * there will be one entry in this array for each two (dummy) sensors in
- * CONFIG_DTT_SENSORS.
- *
- * For uCP1020 module:
- * - only one ADM1021/NCT72
- * - i2c addr 0x41
- * - conversion rate 0x02 = 0.25 conversions/second
- * - ALERT output disabled
- * - local temp sensor enabled, min set to 0 deg, max set to 85 deg
- * - remote temp sensor enabled, min set to 0 deg, max set to 85 deg
- */
-#define CONFIG_SYS_DTT_ADM1021 { { CONFIG_SYS_I2C_NCT72_ADDR, \
-                                        0x02, 0, 1, 0, 85, 1, 0, 85} }
-
-#define CONFIG_CMD_DTT
-
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
 #define CONFIG_L2_CACHE
 #define CONFIG_BTB
 
-#define CONFIG_BOARD_EARLY_INIT_F      /* Call board_pre_init */
-
 #define CONFIG_ENABLE_36BIT_PHYS
 
 #define CONFIG_SYS_MEMTEST_START       0x00200000      /* memtest works on */
@@ -189,7 +164,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_NUM_DDR_CONTROLLERS     1
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 
 /* Default settings for DDR3 */
@@ -336,7 +310,7 @@
 #define CONFIG_SYS_SPD_BUS_NUM         1 /* For rom_loc and flash bank */
 
 #define CONFIG_RTC_DS1337
-#define CONFIG_SYS_RTC_DS1337_NOOSC
+#define CONFIG_RTC_DS1337_NOOSC
 #define CONFIG_SYS_I2C_RTC_ADDR                0x68
 #define CONFIG_SYS_I2C_PCA9557_ADDR    0x18
 #define CONFIG_SYS_I2C_NCT72_ADDR      0x4C
@@ -381,7 +355,6 @@
 #define CONFIG_CMD_PCI
 
 #define CONFIG_PCI_SCAN_SHOW   /* show pci devices on startup */
-#define CONFIG_DOS_PARTITION
 #endif /* CONFIG_PCI */
 
 /*
@@ -447,12 +420,7 @@
 /*
  * Command line configuration.
  */
-#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_IRQ
 #define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_ERRATA
-#define CONFIG_CMD_CRAMFS
 
 /*
  * USB
@@ -460,11 +428,9 @@
 #define CONFIG_HAS_FSL_DR_USB
 
 #if defined(CONFIG_HAS_FSL_DR_USB)
-#define CONFIG_USB_EHCI
-
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 
-#ifdef CONFIG_USB_EHCI
+#ifdef CONFIG_USB_EHCI_HCD
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_USB_EHCI_FSL
 #endif
@@ -477,11 +443,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #define CONFIG_MMC_SPI
 #define CONFIG_CMD_MMC_SPI
-#define CONFIG_GENERIC_MMC
-#endif
-
-#if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI) || defined(CONFIG_FSL_SATA)
-#define CONFIG_DOS_PARTITION
 #endif
 
 /* Misc Extra Settings */
@@ -565,8 +526,6 @@
 
 #define CONFIG_BOOTARGS        /* the boot command will set bootargs */
 
-#define CONFIG_BAUDRATE        115200
-
 #if defined(CONFIG_DONGLE)
 
 #define        CONFIG_EXTRA_ENV_SETTINGS                                       \