Change all '$(...)' variable references into '${...}'

[platform/kernel/u-boot.git] / include / configs / TQM866M.h

diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h
index 31f6d73..8f9c2c9 100644 (file)
--- a/include/configs/TQM866M.h
+++ b/include/configs/TQM866M.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2000-2003
+ * (C) Copyright 2000-2005
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -36,16 +36,21 @@
 #define CONFIG_MPC866          1       /* This is a MPC866 CPU         */
 #define CONFIG_TQM866M         1       /* ...on a TQM8xxM module       */
 
-#define CFG_866_OSCCLK         10000000        /*  10 MHz - PLL input clock            */
-#define CFG_866_CPUCLK_MIN     40000000        /*  40 MHz - CPU minimum clock          */
-#define CFG_866_CPUCLK_MAX     133000000       /* 133 MHz - CPU maximum clock          */
-#define CFG_866_CPUCLK_DEFAULT 100000000       /* 100 MHz - CPU default clock          */
+#define CONFIG_8xx_OSCLK               10000000        /*  10 MHz - PLL input clock    */
+#define CFG_8xx_CPUCLK_MIN             15000000        /*  15 MHz - CPU minimum clock  */
+#define CFG_8xx_CPUCLK_MAX             133000000       /* 133 MHz - CPU maximum clock  */
+#define CONFIG_8xx_CPUCLK_DEFAULT      50000000        /*  50 MHz - CPU default clock  */
                                                /* (it will be used if there is no      */
                                                /* 'cpuclk' variable with valid value)  */
 
+#undef CFG_MEASURE_CPUCLK                      /* Measure real cpu clock       */
+                                               /* (function measure_gclk()     */
+                                               /* will be called)              */
+#ifdef CFG_MEASURE_CPUCLK
+#define CFG_8XX_XIN            10000000        /* measure_gclk() needs this    */
+#endif
+
 #define CONFIG_8xx_CONS_SMC1   1       /* Console is on SMC1           */
-#undef CONFIG_8xx_CONS_SMC2
-#undef CONFIG_8xx_CONS_NONE
 
 #define CONFIG_BAUDRATE                115200  /* console baudrate = 115kbps   */
 
@@ -64,18 +69,18 @@
 #define CONFIG_EXTRA_ENV_SETTINGS                                      \
        "netdev=eth0\0"                                                 \
        "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
-               "nfsroot=$(serverip):$(rootpath)\0"                     \
+               "nfsroot=${serverip}:${rootpath}\0"                     \
        "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
-       "addip=setenv bootargs $(bootargs) "                            \
-               "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"      \
-               ":$(hostname):$(netdev):off panic=1\0"                  \
+       "addip=setenv bootargs ${bootargs} "                            \
+               "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
+               ":${hostname}:${netdev}:off panic=1\0"                  \
        "flash_nfs=run nfsargs addip;"                                  \
-               "bootm $(kernel_addr)\0"                                \
+               "bootm ${kernel_addr}\0"                                \
        "flash_self=run ramargs addip;"                                 \
-               "bootm $(kernel_addr) $(ramdisk_addr)\0"                \
-       "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0"     \
+               "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
+       "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"     \
        "rootpath=/opt/eldk/ppc_8xx\0"                                  \
-       "bootfile=/tftpboot/TQM855M/uImage\0"                           \
+       "bootfile=/tftpboot/TQM866M/uImage\0"                           \
        "kernel_addr=40080000\0"                                        \
        "ramdisk_addr=40180000\0"                                       \
        ""
@@ -125,15 +130,17 @@
 #define CONFIG_MAC_PARTITION
 #define CONFIG_DOS_PARTITION
 
-#define CONFIG_RTC_MPC8xx              /* use internal RTC of MPC8xx   */
+#undef CONFIG_RTC_MPC8xx               /* MPC866 does not support RTC  */
+
+#define        CONFIG_TIMESTAMP                /* but print image timestmps    */
 
 #define CONFIG_COMMANDS              ( CONFIG_CMD_DFL  | \
                                CFG_CMD_ASKENV  | \
                                CFG_CMD_DHCP    | \
                                CFG_CMD_EEPROM  | \
-                               CFG_CMD_IDE     | \
                                CFG_CMD_I2C     | \
-                               CFG_CMD_DATE    )
+                               CFG_CMD_IDE     | \
+                               CFG_CMD_NFS     )
 
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>
@@ -271,12 +278,6 @@
 #define CFG_TBSCR      (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF)
 
 /*-----------------------------------------------------------------------
- * RTCSC - Real-Time Clock Status and Control Register         11-27
- *-----------------------------------------------------------------------
- */
-#define CFG_RTCSC      (RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE)
-
-/*-----------------------------------------------------------------------
  * PISCR - Periodic Interrupt Status and Control               11-31
  *-----------------------------------------------------------------------
  * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
@@ -398,19 +399,18 @@
 #endif /* CONFIG_CAN_DRIVER */
 
 /*
- * 
  * 4096        Rows from SDRAM example configuration
  * 1000        factor s -> ms
  * 64  PTP (pre-divider from MPTPR) from SDRAM example configuration
  * 4   Number of refresh cycles per period
  * 64  Refresh cycle in ms per number of rows
  */
-#define CFG_866_PTA_PER_CLK    ((4096 * 64 * 1000) / (4 * 64))
+#define CFG_PTA_PER_CLK        ((4096 * 64 * 1000) / (4 * 64))
 
 /*
  * Memory Periodic Timer Prescaler
  * Periodic timer for refresh, start with refresh rate for 40 MHz clock
- * (CFG_866_CPUCLK_MIN / CFG_866_PTA_PER_CLK)
+ * (CFG_8xx_CPUCLK_MIN / CFG_PTA_PER_CLK)
  */
 #define CFG_MAMR_PTA           39