hush.c: Move default CONFIG_SYS_PROMPT_HUSH_PS2 to hush.c

[platform/kernel/u-boot.git] / include / configs / TQM85xx.h

diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h
index d95f75d..95455c4 100644 (file)
--- a/include/configs/TQM85xx.h
+++ b/include/configs/TQM85xx.h
@@ -130,23 +130,27 @@
 #define CONFIG_SYS_MEMTEST_START       0x00000000
 #define CONFIG_SYS_MEMTEST_END         0x10000000
 
-/*
- * Base addresses -- Note these are effective addresses where the
- * actual resources get mapped (not physical addresses)
- */
-#define CONFIG_SYS_CCSRBAR_DEFAULT     0xFF700000      /* CCSRBAR Default      */
 #ifdef CONFIG_TQM_BIGFLASH
-#define CONFIG_SYS_CCSRBAR             0xA0000000      /* relocated CCSRBAR    */
-#else /* !CONFIG_TQM_BIGFLASH */
-#define CONFIG_SYS_CCSRBAR             0xE0000000      /* relocated CCSRBAR    */
-#endif /* CONFIG_TQM_BIGFLASH */
-#define CONFIG_SYS_CCSRBAR_PHYS        CONFIG_SYS_CCSRBAR      /* physical addr of CCSRBAR */
-#define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR    */
+#define CONFIG_SYS_CCSRBAR             0xA0000000
+#else
+#define CONFIG_SYS_CCSRBAR             0xE0000000
+#endif
+#define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /*
  * DDR Setup
  */
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000      /* DDR is system memory */
+
+#if defined(CONFIG_TQM_BIGFLASH) || \
+       (!defined(CONFIG_TQM8548_AG) && !defined(CONFIG_TQM8548_BE))
+#define CONFIG_SYS_PPC_DDR_WIMGE (MAS2_I | MAS2_G)
+#define CONFIG_SYS_DDR_EARLY_SIZE_MB   (512)
+#else
+#define CONFIG_SYS_PPC_DDR_WIMGE (0)
+#define CONFIG_SYS_DDR_EARLY_SIZE_MB   (2 * 1024)
+#endif
+
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 #ifdef CONFIG_TQM8548_AG
 #define CONFIG_VERY_BIG_RAM
@@ -158,7 +162,7 @@
 
 #if defined(CONFIG_TQM8540) || defined(CONFIG_TQM8560)
 /* TQM8540 & 8560 need DLL-override */
-#define CONFIG_DDR_DLL                         /* DLL fix needed       */
+#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN    /* possible DLL fix needed */
 #define CONFIG_DDR_DEFAULT_CL  25              /* CAS latency 2,5      */
 #endif /* CONFIG_TQM8540 || CONFIG_TQM8560 */
 
@@ -243,10 +247,9 @@
 #define CONFIG_SYS_INIT_RAM_LOCK       1
 #define CONFIG_SYS_INIT_RAM_ADDR       (CONFIG_SYS_CCSRBAR \
                                 + 0x04010000)  /* Initial RAM address  */
-#define CONFIG_SYS_INIT_RAM_END        0x4000          /* End used area in RAM */
+#define CONFIG_SYS_INIT_RAM_SIZE       0x4000          /* Size used area in RAM        */
 
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* num bytes initial data       */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_LEN         (~CONFIG_SYS_TEXT_BASE + 1)/* Reserved for Monitor      */
@@ -287,9 +290,6 @@
 #define CONFIG_CMDLINE_EDITING 1       /* add command line history     */
 #define CONFIG_AUTO_COMPLETE   1       /* add autocompletion support */
 #define CONFIG_SYS_HUSH_PARSER         1       /* Use the HUSH parser          */
-#ifdef CONFIG_SYS_HUSH_PARSER
-#define        CONFIG_SYS_PROMPT_HUSH_PS2      "> "
-#endif
 
 /* pass open firmware flat tree */
 #define CONFIG_OF_LIBFDT               1
@@ -380,11 +380,11 @@
  * General PCI
  * Addresses are mapped 1-1.
  */
-#define CONFIG_SYS_PCI1_MEM_BASE       0x80000000
-#define CONFIG_SYS_PCI1_MEM_PHYS       CONFIG_SYS_PCI1_MEM_BASE
+#define CONFIG_SYS_PCI1_MEM_BUS                0x80000000
+#define CONFIG_SYS_PCI1_MEM_PHYS       CONFIG_SYS_PCI1_MEM_BUS
 #define CONFIG_SYS_PCI1_MEM_SIZE       0x20000000      /* 512M                 */
-#define CONFIG_SYS_PCI1_IO_BASE        (CONFIG_SYS_CCSRBAR + 0x02000000)
-#define CONFIG_SYS_PCI1_IO_PHYS        CONFIG_SYS_PCI1_IO_BASE
+#define CONFIG_SYS_PCI1_IO_BUS (CONFIG_SYS_CCSRBAR + 0x02000000)
+#define CONFIG_SYS_PCI1_IO_PHYS        CONFIG_SYS_PCI1_IO_BUS
 #define CONFIG_SYS_PCI1_IO_SIZE        0x1000000       /*  16M                 */
 
 #ifdef CONFIG_PCIE1
@@ -393,16 +393,16 @@
  * Addresses are mapped 1-1.
  */
 #ifdef CONFIG_TQM_BIGFLASH
-#define CONFIG_SYS_PCIE1_MEM_BASE      0xb0000000
+#define CONFIG_SYS_PCIE1_MEM_BUS       0xb0000000
 #define CONFIG_SYS_PCIE1_MEM_SIZE      0x10000000      /* 512M                 */
-#define CONFIG_SYS_PCIE1_IO_BASE       0xaf000000
+#define CONFIG_SYS_PCIE1_IO_BUS                0xaf000000
 #else /* !CONFIG_TQM_BIGFLASH */
-#define CONFIG_SYS_PCIE1_MEM_BASE      0xc0000000
+#define CONFIG_SYS_PCIE1_MEM_BUS       0xc0000000
 #define CONFIG_SYS_PCIE1_MEM_SIZE      0x20000000      /* 512M                 */
-#define CONFIG_SYS_PCIE1_IO_BASE       0xef000000
+#define CONFIG_SYS_PCIE1_IO_BUS                0xef000000
 #endif /* CONFIG_TQM_BIGFLASH */
-#define CONFIG_SYS_PCIE1_MEM_PHYS      CONFIG_SYS_PCIE1_MEM_BASE
-#define CONFIG_SYS_PCIE1_IO_PHYS       CONFIG_SYS_PCIE1_IO_BASE
+#define CONFIG_SYS_PCIE1_MEM_PHYS      CONFIG_SYS_PCIE1_MEM_BUS
+#define CONFIG_SYS_PCIE1_IO_PHYS       CONFIG_SYS_PCIE1_IO_BUS
 #define CONFIG_SYS_PCIE1_IO_SIZE       0x1000000       /* 16M                  */
 #endif /* CONFIG_PCIE1 */
 
@@ -418,7 +418,6 @@
 
 #endif /* CONFIG_PCI */
 
-#define CONFIG_NET_MULTI       1
 
 #define CONFIG_MII             1       /* MII PHY management           */
 #define CONFIG_TSEC1   1
@@ -629,14 +628,6 @@
  */
 #define CONFIG_SYS_BOOTMAPSZ   (8 << 20)       /* Initial Memory map for Linux */
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD  0x01            /* Power-On: Boot from FLASH    */
-#define BOOTFLAG_WARM  0x02            /* Software reboot              */
-
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port*/
 #define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use     */