* High Level Configuration Options
*/
#define CONFIG_E300 1 /* E300 Family */
-#define CONFIG_MPC83XX 1 /* MPC83XX family */
-#define CONFIG_MPC834X 1 /* MPC834X specific */
+#define CONFIG_MPC83xx 1 /* MPC83xx family */
+#define CONFIG_MPC834x 1 /* MPC834x specific */
#define CONFIG_MPC8349 1 /* MPC8349 specific */
#define CONFIG_TQM834X 1 /* TQM834X board specific */
* External Local Bus rate is
* CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_8)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_8
/* board pre init: do not call, nothing to do */
#undef CONFIG_BOARD_EARLY_INIT_F
* FLASH on the Local Bus
*/
#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */
-#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
+#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
#undef CONFIG_SYS_FLASH_CHECKSUM
#define CONFIG_SYS_FLASH_BASE 0x80000000 /* start of FLASH */
#define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size in MB */
-
-/* buffered writes in the AMD chip set is not supported yet */
-#undef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sectors */
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
/*
* FLASH bank number detection
* defined as tqm834x_num_flash_banks.
*/
#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 2
-#ifndef __ASSEMBLY__
-extern int tqm834x_num_flash_banks;
-#endif
-#define CONFIG_SYS_MAX_FLASH_BANKS (tqm834x_num_flash_banks)
#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max sectors per device */
#define CONFIG_SYS_LBLAWBAR3_PRELIM 0x00000000
#define CONFIG_SYS_LBLAWAR3_PRELIM 0x00000000
-#define CONFIG_SYS_BR4_PRELIM 0x00000000
-#define CONFIG_SYS_OR4_PRELIM 0x00000000
-#define CONFIG_SYS_LBLAWBAR4_PRELIM 0x00000000
-#define CONFIG_SYS_LBLAWAR4_PRELIM 0x00000000
-
-#define CONFIG_SYS_BR5_PRELIM 0x00000000
-#define CONFIG_SYS_OR5_PRELIM 0x00000000
-#define CONFIG_SYS_LBLAWBAR5_PRELIM 0x00000000
-#define CONFIG_SYS_LBLAWAR5_PRELIM 0x00000000
-
-#define CONFIG_SYS_BR6_PRELIM 0x00000000
-#define CONFIG_SYS_OR6_PRELIM 0x00000000
-#define CONFIG_SYS_LBLAWBAR6_PRELIM 0x00000000
-#define CONFIG_SYS_LBLAWAR6_PRELIM 0x00000000
-
-#define CONFIG_SYS_BR7_PRELIM 0x00000000
-#define CONFIG_SYS_OR7_PRELIM 0x00000000
-#define CONFIG_SYS_LBLAWBAR7_PRELIM 0x00000000
-#define CONFIG_SYS_LBLAWAR7_PRELIM 0x00000000
-
/*
* Monitor config
*/
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
-#define CONFIG_SYS_RAMBOOT
+# define CONFIG_SYS_RAMBOOT
#else
-#undef CONFIG_SYS_RAMBOOT
+# undef CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
-#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc */
+#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB = 3 sect. for Mon */
+#define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserve 512 kB for malloc */
/*
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
/* PCI1 host bridge */
-#define CONFIG_SYS_PCI1_MEM_BASE 0xc0000000
+#define CONFIG_SYS_PCI1_MEM_BASE 0x90000000
#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
-#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */
+#define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */
+#define CONFIG_SYS_PCI1_MMIO_BASE (CONFIG_SYS_PCI1_MEM_BASE + CONFIG_SYS_PCI1_MEM_SIZE)
+#define CONFIG_SYS_PCI1_MMIO_PHYS CONFIG_SYS_PCI1_MMIO_BASE
+#define CONFIG_SYS_PCI1_MMIO_SIZE 0x10000000 /* 256M */
#define CONFIG_SYS_PCI1_IO_BASE 0xe2000000
#define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE
#define CONFIG_SYS_PCI1_IO_SIZE 0x1000000 /* 16M */
/*
* Environment
*/
-#define CONFIG_ENV_OVERWRITE
-
-#ifndef CONFIG_SYS_RAMBOOT
- #define CONFIG_ENV_IS_IN_FLASH 1
- #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x40000)
- #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */
- #define CONFIG_ENV_SIZE 0x2000
-#else
- #define CONFIG_SYS_NO_FLASH 1 /* Flash is not usable now */
- #define CONFIG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */
- #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000)
- #define CONFIG_ENV_SIZE 0x2000
-#endif
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
+#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) for env */
+#define CONFIG_ENV_SIZE 0x8000 /* 32K max size */
+#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
-#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/*
* BOOTP options
*/
#include <config_cmd_default.h>
+#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
#define CONFIG_CMD_DTT
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_I2C
+#define CONFIG_CMD_NFS
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
-#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SNTP
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
+#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
+
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#ifdef CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#undef CONFIG_WATCHDOG /* watchdog disabled */
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_OF_STDOUT_VIA_ALIAS 1
+
/*
* For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
+ * have to be in the first 256 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
-#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
+#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux*/
#define CONFIG_SYS_HRCW_LOW (\
HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
#endif
/* System IO Config */
-#define CONFIG_SYS_SICRH SICRH_TSOBI1
+#define CONFIG_SYS_SICRH 0
#define CONFIG_SYS_SICRL SICRL_LDP_A
/* i-cache and d-cache disabled */
#define CONFIG_SYS_HID0_INIT 0x000000000
-#define CONFIG_SYS_HID0_FINAL CONFIG_SYS_HID0_INIT
+#define CONFIG_SYS_HID0_FINAL (CONFIG_SYS_HID0_INIT | \
+ HID0_ENABLE_INSTRUCTION_CACHE)
#define CONFIG_SYS_HID2 HID2_HBE
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
#ifdef CONFIG_PCI
#define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
#define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI1_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI1_MEM_BASE + 0x10000000 | BATL_PP_10 | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI1_MEM_BASE + 0x10000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI1_MMIO_BASE | BATL_PP_10 | BATL_MEMCOHERENCE | BATL_GUARDEDSTORAGE)
+#define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI1_MMIO_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
#define CONFIG_SYS_IBAT5L (CONFIG_SYS_PCI1_IO_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_PCI1_IO_BASE + 0x10000000 | BATU_BL_16M | BATU_VS | BATU_VP)
+#define CONFIG_SYS_IBAT5U (CONFIG_SYS_PCI1_IO_BASE | BATU_BL_16M | BATU_VS | BATU_VP)
#else
#define CONFIG_SYS_IBAT3L (0)
#define CONFIG_SYS_IBAT3U (0)
"addip=setenv bootargs ${bootargs} " \
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
":${hostname}:${netdev}:off panic=1\0" \
- "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
- "flash_nfs=run nfsargs addip addtty;" \
+ "addcons=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
+ "flash_nfs_old=run nfsargs addip addcons;" \
"bootm ${kernel_addr}\0" \
- "flash_self=run ramargs addip addtty;" \
+ "flash_nfs=run nfsargs addip addcons;" \
+ "bootm ${kernel_addr} - ${fdt_addr}\0" \
+ "flash_self_old=run ramargs addip addcons;" \
"bootm ${kernel_addr} ${ramdisk_addr}\0" \
- "net_nfs=tftp 400000 ${bootfile};run nfsargs addip addtty;" \
- "bootm\0" \
+ "flash_self=run ramargs addip addcons;" \
+ "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
+ "net_nfs_old=tftp 400000 ${bootfile};" \
+ "run nfsargs addip addcons;bootm\0" \
+ "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
+ "tftp ${fdt_addr_r} ${fdt_file}; " \
+ "run nfsargs addip addcons; " \
+ "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
"rootpath=/opt/eldk/ppc_6xx\0" \
- "bootfile=/tftpboot/tqm834x/uImage\0" \
- "kernel_addr=80060000\0" \
- "ramdisk_addr=80160000\0" \
- "load=tftp 100000 /tftpboot/tqm834x/u-boot.bin\0" \
- "update=protect off 80000000 8003ffff; " \
- "era 80000000 8003ffff; cp.b 100000 80000000 40000\0" \
+ "bootfile=tqm834x/uImage\0" \
+ "fdtfile=tqm834x/tqm834x.dtb\0" \
+ "kernel_addr_r=400000\0" \
+ "fdt_addr_r=600000\0" \
+ "ramdisk_addr_r=800000\0" \
+ "kernel_addr=800C0000\0" \
+ "fdt_addr=800A0000\0" \
+ "ramdisk_addr=80300000\0" \
+ "u-boot=tqm834x/u-boot.bin\0" \
+ "load=tftp 200000 ${u-boot}\0" \
+ "update=protect off 80000000 +${filesize};" \
+ "era 80000000 +${filesize};" \
+ "cp.b 200000 80000000 ${filesize}\0" \
"upd=run load update\0" \
""
* JFFS2 partitions
*/
/* mtdparts command line support */
-#define CONFIG_JFFS2_CMDLINE
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
+#define CONFIG_FLASH_CFI_MTD
#define MTDIDS_DEFAULT "nor0=TQM834x-0"
/* default mtd partition table */