#define CONFIG_TQM8272 1
#define CONFIG_GET_CPU_STR_F 1 /* Get the CPU ID STR */
-#define CONFIG_BOARD_GET_CPU_CLK_F 1 /* Get the CLKIN from board fct */
-
+#define CONFIG_BOARD_GET_CPU_CLK_F 1 /* Get the CLKIN from board fct */
+
#define STK82xx_150 1 /* on a STK82xx.150 */
#define CONFIG_CPM2 1 /* Has a CPM2 */
#define CONFIG_BAUDRATE 115200
#endif
-#define CONFIG_PREBOOT "echo;echo Type \"run flash_nfs\" to mount root filesystem over NFS;echo"
+#define CONFIG_PREBOOT "echo;echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;echo"
#undef CONFIG_BOOTARGS
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
":${hostname}:${netdev}:off panic=1\0" \
"addcons=setenv bootargs ${bootargs} " \
- "console=$(consdev),$(baudrate)\0" \
- "flash_nfs=run nfsargs addip addcons;" \
+ "console=$(consdev),$(baudrate)\0" \
+ "flash_nfs=run nfsargs addip addcons;" \
"bootm ${kernel_addr}\0" \
- "flash_self=run ramargs addip addcons;" \
+ "flash_self=run ramargs addip addcons;" \
"bootm ${kernel_addr} ${ramdisk_addr}\0" \
"net_nfs=tftp 300000 ${bootfile};" \
- "run nfsargs addip addcons;bootm\0" \
+ "run nfsargs addip addcons;bootm\0" \
"rootpath=/opt/eldk/ppc_82xx\0" \
"bootfile=/tftpboot/tqm8272/uImage\0" \
"kernel_addr=40080000\0" \
"update=protect off 40000000 4003ffff;era 40000000 4003ffff;" \
"cp.b 300000 40000000 40000;" \
"setenv filesize;saveenv\0" \
- "cphwib=cp.b 4003fc00 33fc00 400\0" \
- "upd=run load;run cphwib;run update\0" \
+ "cphwib=cp.b 4003fc00 33fc00 400\0" \
+ "upd=run load cphwib update\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
/* enable I2C and select the hardware/software driver */
#undef CONFIG_HARD_I2C /* I2C with hardware support */
#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-#define ADD_CMD_I2C CFG_CMD_I2C | \
- CFG_CMD_DATE |\
- CFG_CMD_DTT |\
- CFG_CMD_EEPROM
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
#define CFG_I2C_SLAVE 0x7F
#else
#undef CONFIG_HARD_I2C
#undef CONFIG_SOFT_I2C
-#define ADD_CMD_I2C 0
#endif
/*
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*
* (On TQM8272 either SCC1 or FCC2 may be chosen: SCC1 is hardwired to the
* X.29 connector, and FCC2 is hardwired to the X.1 connector)
#define MIIDELAY udelay(1)
-
/* system clock rate (CLKIN) - equal to the 60x and local bus speed */
#define CONFIG_8260_CLKIN 66666666 /* in Hz */
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SNTP
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_NAND | \
- CFG_CMD_DHCP | \
- CFG_CMD_PING | \
- ADD_CMD_I2C | \
- CFG_CMD_NFS | \
- CFG_CMD_MII | \
- CFG_CMD_PCI | \
- CFG_CMD_SNTP )
+#if CONFIG_I2C
+ #define CONFIG_CMD_I2C
+ #define CONFIG_CMD_DATE
+ #define CONFIG_CMD_DTT
+ #define CONFIG_CMD_EEPROM
+#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
/*
* Miscellaneous configurable options
#endif
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
* NAND-FLASH stuff
*-----------------------------------------------------------------------
*/
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#define CFG_NAND_CS_DIST 0x80
#define CFG_NAND_UPM_WRITE_CMD_OFS 0x20
WRITE_NAND(d, addr); \
} while(0)
-#endif /* CFG_CMD_NAND */
+#endif /* CONFIG_CMD_NAND */
#define CONFIG_PCI
#ifdef CONFIG_PCI
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
* 0 60x GPCM 32 bit FLASH
* 1 60x SDRAM 64 bit SDRAM
* 2 60x UPMB 8 bit NAND
- * 3 60x UPMC 8 bit CAN
+ * 3 60x UPMC 8 bit CAN
*
*/
*/
#define CFG_MRS_OFFS 0x00000110
-
/* Bank 0 - FLASH
*/
#define CFG_BR0_PRELIM ((CFG_FLASH_BASE & BRx_BA_MSK) |\
PSDMR_BUFCMD |\
PSDMR_CL_2)
-
#define PSDMR_RFRC_66MHZ_SINGLE 0x00028000 /* PSDMR[RFRC] at 66 MHz single mode */
#define PSDMR_RFRC_100MHZ_SINGLE 0x00030000 /* PSDMR[RFRC] at 100 MHz single mode */
#define PSDMR_RFRC_133MHZ_SINGLE 0x00030000 /* PSDMR[RFRC] at 133 MHz single mode */