pci: introduce CONFIG_PCI_INDIRECT_BRIDGE option

[platform/kernel/u-boot.git] / include / configs / TQM8272.h

diff --git a/include/configs/TQM8272.h b/include/configs/TQM8272.h
index 6eaa61d..3b3f9e6 100644 (file)
--- a/include/configs/TQM8272.h
+++ b/include/configs/TQM8272.h
@@ -37,6 +37,8 @@
 #define CONFIG_MPC8272_FAMILY   1
 #define CONFIG_TQM8272         1
 
+#define        CONFIG_SYS_TEXT_BASE    0x40000000
+
 #define        CONFIG_GET_CPU_STR_F    1       /* Get the CPU ID STR */
 #define CONFIG_BOARD_GET_CPU_CLK_F     1 /* Get the CLKIN from board fct */
 
@@ -206,8 +208,8 @@
  * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
  * - Enable Full Duplex in FSMR
  */
-# define CONFIG_SYS_CMXFCR_MASK        (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
-# define CONFIG_SYS_CMXFCR_VALUE       (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
+# define CONFIG_SYS_CMXFCR_MASK2       (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
+# define CONFIG_SYS_CMXFCR_VALUE2      (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
 # define CONFIG_SYS_CPMFCR_RAMTYPE     0
 # define CONFIG_SYS_FCC_PSMR           (FCC_PSMR_FDE|FCC_PSMR_LPB)
 
@@ -309,9 +311,6 @@
 #if 0
 #define CONFIG_CMDLINE_EDITING 1       /* add command line history     */
 #define CONFIG_SYS_HUSH_PARSER         1       /* Use the HUSH parser          */
-#ifdef CONFIG_SYS_HUSH_PARSER
-#define        CONFIG_SYS_PROMPT_HUSH_PS2      "> "
-#endif
 #endif
 
 #if defined(CONFIG_CMD_KGDB)
@@ -330,8 +329,6 @@
 
 #define        CONFIG_SYS_HZ           1000            /* decrementer freq: 1 ms ticks */
 
-#define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
-
 #define        CONFIG_SYS_RESET_ADDRESS 0x40000104     /* "bad" address                */
 
 /*
@@ -357,7 +354,7 @@
 
 
 /* What should the base address of the main FLASH be and how big is
- * it (in MBytes)? This must contain TEXT_BASE from board/tqm8272/config.mk
+ * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/tqm8272/config.mk
  * The main FLASH is whichever is connected to *CS0.
  */
 #define CONFIG_SYS_FLASH0_BASE 0x40000000
@@ -442,12 +439,11 @@
        WRITE_NAND(d, addr); \
 } while(0)
 
-#define CONFIG_SYS_64BIT_VSPRINTF      /* needed for nand_util.c */
-
 #endif /* CONFIG_CMD_NAND */
 
 #define        CONFIG_PCI
 #ifdef CONFIG_PCI
+#define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_BOARD_EARLY_INIT_F 1    /* Call board_early_init_f      */
 #define CONFIG_PCI_PNP
 #define CONFIG_EEPRO100
@@ -488,9 +484,8 @@
  * Definitions for initial stack pointer and data area (in DPRAM)
  */
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_IMMR
-#define CONFIG_SYS_INIT_RAM_END        0x2000  /* End of used area in DPRAM    */
-#define CONFIG_SYS_GBL_DATA_SIZE       128 /* size in bytes reserved for initial data*/
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE       0x2000  /* Size of used area in DPRAM    */
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 /*-----------------------------------------------------------------------
@@ -500,18 +495,10 @@
  */
 #define CONFIG_SYS_SDRAM_BASE          0x00000000
 #define CONFIG_SYS_FLASH_BASE          CONFIG_SYS_FLASH0_BASE
-#define CONFIG_SYS_MONITOR_BASE        TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_MONITOR_LEN         (192 << 10)     /* Reserve 192 kB for Monitor */
 #define CONFIG_SYS_MALLOC_LEN          (128 << 10)     /* Reserve 128 kB for malloc()*/
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD          0x01    /* Normal Power-On: Boot from FLASH*/
-#define BOOTFLAG_WARM          0x02    /* Software reboot                 */
-
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */