Convert CONFIG_SYS_I2C_LEGACY to Kconfig and add CONFIG_[ST]PL_SYS_I2C_LEGACY

[platform/kernel/u-boot.git] / include / configs / T4240RDB.h

diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index f051998..ad2e1e2 100644 (file)
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
  */
 
 /*
@@ -10,6 +10,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #define CONFIG_FSL_SATA_V2
 #define CONFIG_PCIE4
 
@@ -64,8 +66,6 @@
 #define CONFIG_PCIE3                   /* PCIE controller 3 */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */
 
-#define CONFIG_ENV_OVERWRITE
-
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
@@ -78,9 +78,6 @@
 
 #define CONFIG_ENABLE_36BIT_PHYS
 
-#define CONFIG_ADDR_MAP
-#define CONFIG_SYS_NUM_ADDR_MAP                64      /* number of TLB1 entries */
-
 /*
  *  Config the L3 Cache as L3 SRAM
  */
@@ -157,8 +154,7 @@
 #define CONFIG_SYS_NS16550_COM4        (CONFIG_SYS_CCSRBAR+0x11D600)
 
 /* I2C */
-#ifndef CONFIG_DM_I2C
-#define CONFIG_SYS_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
 #define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET      0x118000
 #define CONFIG_SYS_FSL_I2C2_SLAVE      0x7F
@@ -199,27 +195,6 @@
 #define CONFIG_SYS_PCIE4_IO_PHYS       0xff8030000ull
 
 #ifdef CONFIG_PCI
-#if !defined(CONFIG_DM_PCI)
-#define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
-#define CONFIG_SYS_PCIE1_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE1_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE1_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE1_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE2_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE2_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE2_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE2_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE3_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE3_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE3_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE3_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_SYS_PCIE4_MEM_BUS       0xe0000000
-#define CONFIG_SYS_PCIE4_MEM_SIZE      0x20000000      /* 512M */
-#define CONFIG_SYS_PCIE4_IO_BUS                0x00000000
-#define CONFIG_SYS_PCIE4_IO_SIZE       0x00010000      /* 64k */
-#define CONFIG_PCI_INDIRECT_BRIDGE
-#endif
-
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
 #endif /* CONFIG_PCI */
 
@@ -247,10 +222,6 @@
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   /* allow baudrate change */
 
 /*
- * Command line configuration.
- */
-
-/*
  * Miscellaneous configurable options
  */
 #define CONFIG_SYS_LOAD_ADDR   0x2000000       /* default load address */
@@ -281,11 +252,6 @@
        "setenv bootargs config-addr=0x60000000; "      \
        "bootm 0x01000000 - 0x00f00000"
 
-#if defined(CONFIG_SPIFLASH)
-#elif defined(CONFIG_SDCARD)
-#define CONFIG_SYS_MMC_ENV_DEV          0
-#endif
-
 #define CONFIG_SYS_CLK_FREQ    66666666
 #define CONFIG_DDR_CLK_FREQ    133333333
 
@@ -550,8 +516,6 @@ unsigned long get_board_ddr_clk(void);
 #endif /* CONFIG_NOBQFMAN */
 
 #ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_CORTINA_FW_ADDR         0xefe00000
-#define CONFIG_CORTINA_FW_LENGTH       0x40000
 #define SGMII_PHY_ADDR1 0x0
 #define SGMII_PHY_ADDR2 0x1
 #define SGMII_PHY_ADDR3 0x2
@@ -597,7 +561,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_MMC
 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 #endif