Merge branch '2022-06-28-Kconfig-migrations' into next

[platform/kernel/u-boot.git] / include / configs / T4240RDB.h

diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 549252c..526d40f 100644 (file)
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -12,7 +12,6 @@
 
 #include <linux/stringify.h>
 
-#define CONFIG_FSL_SATA_V2
 #define CONFIG_PCIE4
 
 #define CONFIG_ICS307_REFCLK_HZ                25000000  /* ICS307 ref clk freq */
@@ -31,9 +30,6 @@
 #define CONFIG_SYS_MMC_U_BOOT_DST      0x00200000
 #define CONFIG_SYS_MMC_U_BOOT_START    0x00200000
 #define CONFIG_SYS_MMC_U_BOOT_OFFS     (260 << 10)
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#endif
 #endif
 
 #endif
@@ -67,11 +63,7 @@
  */
 #define CONFIG_SYS_INIT_L3_ADDR                0xFFFC0000
 #define CONFIG_SYS_L3_SIZE             (512 << 10)
-#define CONFIG_SPL_GD_ADDR             (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024)
 #define SPL_ENV_ADDR                   (CONFIG_SPL_GD_ADDR + 4 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_ADDR   (CONFIG_SPL_GD_ADDR + 12 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_SIZE   (50 << 10)
-#define CONFIG_SPL_RELOC_STACK         (CONFIG_SPL_GD_ADDR + 64 * 1024)
 
 #define CONFIG_SYS_DCSRBAR             0xf0000000
 #define CONFIG_SYS_DCSRBAR_PHYS                0xf00000000ull
@@ -104,7 +96,6 @@
 #define CONFIG_SYS_INIT_RAM_SIZE               0x00004000
 
 #define CONFIG_SYS_INIT_SP_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 #define CONFIG_SYS_MONITOR_LEN         (768 * 1024)
 
@@ -158,18 +149,6 @@
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
 #endif /* CONFIG_PCI */
 
-/* SATA */
-#ifdef CONFIG_FSL_SATA_V2
-#define CONFIG_SATA1
-#define CONFIG_SYS_SATA1               CONFIG_SYS_MPC85xx_SATA1_ADDR
-#define CONFIG_SYS_SATA1_FLAGS         FLAGS_DMA
-#define CONFIG_SATA2
-#define CONFIG_SYS_SATA2               CONFIG_SYS_MPC85xx_SATA2_ADDR
-#define CONFIG_SYS_SATA2_FLAGS         FLAGS_DMA
-
-#define CONFIG_LBA48
-#endif
-
 /*
  * Environment
  */
@@ -438,23 +417,9 @@
 #define CORTINA_PHY_ADDR4      FM2_10GEC2_PHY_ADDR
 #endif
 
-/* SATA */
-#ifdef CONFIG_FSL_SATA_V2
-#define CONFIG_SATA1
-#define CONFIG_SYS_SATA1               CONFIG_SYS_MPC85xx_SATA1_ADDR
-#define CONFIG_SYS_SATA1_FLAGS         FLAGS_DMA
-#define CONFIG_SATA2
-#define CONFIG_SYS_SATA2               CONFIG_SYS_MPC85xx_SATA2_ADDR
-#define CONFIG_SYS_SATA2_FLAGS         FLAGS_DMA
-
-#define CONFIG_LBA48
-#endif
-
 /*
 * USB
 */
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#define CONFIG_HAS_FSL_DR_USB
 
 #ifdef CONFIG_MMC
 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR