Convert CONFIG_PCI_GT64120 to Kconfig

[platform/kernel/u-boot.git] / include / configs / T208xRDB.h

diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index feec2c3..ba9bfdd 100644 (file)
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -14,11 +14,9 @@
 #include <linux/stringify.h>
 
 #define CONFIG_ICS307_REFCLK_HZ 25000000  /* ICS307 ref clk freq */
-#define CONFIG_FSL_SATA_V2
 
 /* High Level Configuration Options */
 #define CONFIG_SYS_BOOK3E_HV   /* Category E.HV supported */
-#define CONFIG_ENABLE_36BIT_PHYS
 
 #define CONFIG_SYS_FSL_CPC     /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC     CONFIG_SYS_NUM_DDR_CTLRS
@@ -31,21 +29,14 @@
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (768 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST     0x00200000
 #define CONFIG_SYS_NAND_U_BOOT_START   0x00200000
-#ifndef CONFIG_MPC85XX_HAVE_RESET_VECTOR
-#define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#endif
 #endif
 
 #ifdef CONFIG_SPIFLASH
 #define        CONFIG_RESET_VECTOR_ADDRESS             0x200FFC
-#define CONFIG_SPL_SPI_FLASH_MINIMAL
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE       (768 << 10)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST                (0x00200000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_START      (0x00200000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS       (256 << 10)
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#endif
 #endif
 
 #ifdef CONFIG_SDCARD
@@ -54,9 +45,6 @@
 #define CONFIG_SYS_MMC_U_BOOT_DST      (0x00200000)
 #define CONFIG_SYS_MMC_U_BOOT_START    (0x00200000)
 #define CONFIG_SYS_MMC_U_BOOT_OFFS     (260 << 10)
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#endif
 #endif
 
 #endif /* CONFIG_RAMBOOT_PBL */
@@ -87,7 +75,6 @@
  */
 #define CONFIG_SYS_INIT_L3_ADDR                0xFFFC0000
 #define CONFIG_SYS_L3_SIZE             (512 << 10)
-#define CONFIG_SPL_GD_ADDR             (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024)
 #define SPL_ENV_ADDR                   (CONFIG_SPL_GD_ADDR + 4 * 1024)
 
 #define CONFIG_SYS_DCSRBAR     0xf0000000
@@ -103,7 +90,6 @@
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_SYS_SPD_BUS_NUM 0
 #define CONFIG_SYS_SDRAM_SIZE  2048    /* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1    0x51
 #define SPD_EEPROM_ADDRESS2    0x52
@@ -335,10 +321,6 @@
  * General PCI
  * Memory space is mapped 1-1, but I/O space must start from 0.
  */
-#define CONFIG_PCIE1           /* PCIE controller 1 */
-#define CONFIG_PCIE2           /* PCIE controller 2 */
-#define CONFIG_PCIE3           /* PCIE controller 3 */
-#define CONFIG_PCIE4           /* PCIE controller 4 */
 /* controller 1, direct to uli, tgtid 3, Base address 20000 */
 #define CONFIG_SYS_PCIE1_MEM_VIRT      0x80000000
 #define CONFIG_SYS_PCIE1_MEM_PHYS      0xc00000000ull
@@ -362,10 +344,6 @@
 #define CONFIG_SYS_PCIE4_MEM_PHYS      0xc40000000ull
 #define CONFIG_SYS_PCIE4_IO_PHYS       0xff8030000ull
 
-#ifdef CONFIG_PCI
-#define CONFIG_PCI_SCAN_SHOW   /* show pci devices on startup */
-#endif
-
 /* Qman/Bman */
 #ifndef CONFIG_NOBQFMAN
 #define CONFIG_SYS_BMAN_NUM_PORTALS    18
@@ -417,25 +395,8 @@
 #endif
 
 /*
- * SATA
- */
-#ifdef CONFIG_FSL_SATA_V2
-#define CONFIG_SATA1
-#define CONFIG_SYS_SATA1               CONFIG_SYS_MPC85xx_SATA1_ADDR
-#define CONFIG_SYS_SATA1_FLAGS         FLAGS_DMA
-#define CONFIG_SATA2
-#define CONFIG_SYS_SATA2               CONFIG_SYS_MPC85xx_SATA2_ADDR
-#define CONFIG_SYS_SATA2_FLAGS         FLAGS_DMA
-#define CONFIG_LBA48
-#endif
-
-/*
  * USB
  */
-#ifdef CONFIG_USB_EHCI_HCD
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#define CONFIG_HAS_FSL_DR_USB
-#endif
 
 /*
  * SDHC